component
TX4138
Public Made by Adomby adom
XDS DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -37,6 +37,20 @@ TX4138 from XDS, in a SOIC-8-EP. Pinout and pin descriptions extracted from the - Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm` - 3D model: SOIC-8-EP (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`tx4138.step`](tx4138.step) | 125 KB | You want the bare part, or you mark your own boards. |+| [`tx4138-etched.step`](tx4138-etched.step) | 1.4 MB | You want the part with `TX4138` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 369 faces against 152 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "tx4138",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "XDS DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+9−6@@ -4,7 +4,7 @@ "slug": "tx4138", "title": "TX4138", "brief": "XDS DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -40,7 +40,7 @@ "number": "2", "name": "ILIM", "type": "power_in",- "description": "Programmable maximum peak current pin. Power current flows into the chip through an external accurate sense resistor connected between ILIM and VIN; the sense resistor value (~15-30m\u03a9) sets the peak current limit (30m\u03a9 for 2A, 20m\u03a9 for 3A, 15m\u03a9 for 4A). Internally tied to the power MOSFET, so heat dissipation on this pin matters. Absolute maximum: 62V."+ "description": "Programmable maximum peak current pin. Power current flows into the chip through an external accurate sense resistor connected between ILIM and VIN; the sense resistor value (~15-30mΩ) sets the peak current limit (30mΩ for 2A, 20mΩ for 3A, 15mΩ for 4A). Internally tied to the power MOSFET, so heat dissipation on this pin matters. Absolute maximum: 62V." }, { "number": "3",@@ -70,13 +70,13 @@ "number": "7", "name": "POK", "type": "output",- "description": "Power-good open-drain output. Pulled low while FB is less than 90% of the 0.8V reference; goes high-Z when output is in regulation. Requires an external pull-up (e.g. 10k\u03a9) to a system rail up to 45V; can also drive the enable pin of a downstream converter. Tie to GND or leave floating if unused. Absolute maximum: 0V to 45V."+ "description": "Power-good open-drain output. Pulled low while FB is less than 90% of the 0.8V reference; goes high-Z when output is in regulation. Requires an external pull-up (e.g. 10kΩ) to a system rail up to 45V; can also drive the enable pin of a downstream converter. Tie to GND or leave floating if unused. Absolute maximum: 0V to 45V." }, { "number": "8", "name": "BS", "type": "passive",- "description": "Bootstrap capacitor pin. Provides the positive supply rail for the high-side MOSFET gate driver (VBST - VSW = 6V typ). Connect a 100nF ceramic capacitor and a series ~5-10\u03a9 resistor between BS and SW. Absolute maximum: VSW + 6.0V."+ "description": "Bootstrap capacitor pin. Provides the positive supply rail for the high-side MOSFET gate driver (VBST - VSW = 6V typ). Connect a 100nF ceramic capacitor and a series ~5-10Ω resistor between BS and SW. Absolute maximum: VSW + 6.0V." }, { "number": "9",@@ -156,6 +156,9 @@ "docs/hero.png", "docs/tx4138-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"- ]+ "viewers/footprint.html",+ "pads.json"+ ],+ "description": "XDS DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "visibility": "public" }