← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C2923805). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·6a9a50a221 · ·parent d4932da
2 files changed +27−7
page.json+7−5
@@ -26,7 +26,9 @@       "model_3d_step": "tx4120xh.step",       "lbr": "tx4120xh.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C2923805"+    },     "pins": [       {         "number": "1",@@ -44,25 +46,25 @@         "number": "3",         "name": "VIN",         "type": "power_in",-        "description": "Supply input to the IC. Accepts 4.5V to 36V (recommended 6.5V-30V, absolute max 36V; 33V input OVP). Bypass with a large bulk capacitor and at least one 0.1µF ceramic capacitor close to the VIN and GND pins to suppress input noise."+        "description": "Supply input to the IC. Accepts 4.5V to 36V (recommended 6.5V-30V, absolute max 36V; 33V input OVP). Bypass with a large bulk capacitor and at least one 0.1\u00b5F ceramic capacitor close to the VIN and GND pins to suppress input noise."       },       {         "number": "4",         "name": "SW",         "type": "output",-        "description": "Power switch node. Connects to the switching node of the external inductor (junction of the high-side and low-side integrated MOSFETs). Absolute max range −1V to VIN+0.3V."+        "description": "Power switch node. Connects to the switching node of the external inductor (junction of the high-side and low-side integrated MOSFETs). Absolute max range \u22121V to VIN+0.3V."       },       {         "number": "5",         "name": "BST",         "type": "passive",-        "description": "Bootstrap pin for the high-side gate driver. Connect a 0.1µF (or larger) capacitor between SW and BST to supply the high-side MOSFET gate driver. Absolute max VBST−VSW = 6V."+        "description": "Bootstrap pin for the high-side gate driver. Connect a 0.1\u00b5F (or larger) capacitor between SW and BST to supply the high-side MOSFET gate driver. Absolute max VBST\u2212VSW = 6V."       },       {         "number": "6",         "name": "CS",         "type": "input",-        "description": "Current-sense input and mode-select pin. Connect a 10mΩ-100mΩ sense resistor between CS and GND to program the output current limit and enable CC-loop operation (Mode 1); the R1 in Figure 1 can be used for programmed line-drop compensation. Alternatively tie CS to VOUT or leave floating (Mode 0) to disable the CC loop and line-drop compensation - the internal divider then automatically sets VOUT to ~5.1V for minimum external components."+        "description": "Current-sense input and mode-select pin. Connect a 10m\u03a9-100m\u03a9 sense resistor between CS and GND to program the output current limit and enable CC-loop operation (Mode 1); the R1 in Figure 1 can be used for programmed line-drop compensation. Alternatively tie CS to VOUT or leave floating (Mode 0) to disable the CC loop and line-drop compensation - the internal divider then automatically sets VOUT to ~5.1V for minimum external components."       }     ],     "provenance": {
tx4120xh.lbr+20−2
@@ -60,6 +60,18 @@   <smd name="4" x="1.1375" y="-0.9500" dx="1.3250" dy="0.6000" layer="1"/>   <smd name="5" x="1.1375" y="-0.0000" dx="1.3250" dy="0.6000" layer="1"/>   <smd name="6" x="1.1375" y="0.9500" dx="1.3250" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-1.4500" y="1.5100"/>+    <vertex x="-1.6900" y="1.8400"/>+    <vertex x="-1.2100" y="1.8400"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.4000" y="1.4500"/>+    <vertex x="0.8000" y="1.4500"/>+    <vertex x="0.8000" y="-1.4500"/>+    <vertex x="-0.8000" y="-1.4500"/>+    <vertex x="-0.8000" y="1.0500"/>+  </polygon>   <wire x1="-0.9100" y1="1.5600" x2="0.9100" y2="1.5600" width="0.1200" layer="21"/>   <wire x1="-0.9100" y1="1.5100" x2="-0.9100" y2="1.5600" width="0.1200" layer="21"/>   <wire x1="-0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5100" width="0.1200" layer="21"/>@@ -68,7 +80,7 @@   <wire x1="0.9100" y1="-1.5600" x2="-0.9100" y2="-1.5600" width="0.1200" layer="21"/>   <text x="0" y="2.212" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-2.212" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-1.4500" y="1.5100"/><vertex x="-1.6900" y="1.8400"/><vertex x="-1.2100" y="1.8400"/></polygon></package>+</package> </packages> <symbols> <symbol name="TX4120XH">@@ -102,7 +114,13 @@         <connect gate="G$1" pin="BST" pad="5"/>         <connect gate="G$1" pin="SW" pad="4"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="TX4120XH" constant="no"/>+          <attribute name="MANUFACTURER" value="XDS" constant="no"/>+          <attribute name="LCSC_PN" value="C2923805" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>