tsv911ilt: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body w…
tsv911ilt: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout")
tsv911ilt: laser-etched CAD + chip hero (factory 2.0.0 backfill)
tsv911ilt: backfill missing artifacts (variants)
tsv911ilt: publish the laser-etched STEP alongside the bare one
tsv911ilt: factory component page (tier=lcsc)
Initial commit: component/tsv911ilt