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TPS7B8650QKVURQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+42@@ -0,0 +1,42 @@+# TPS7B8650QKVURQ1++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252-4++TPS7B8650QKVURQ1 from Texas Instruments, in a TO-252-4. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN | power_in | Input power voltage pin accepting 3V to 40V with ceramic decoupling capacitor (0.1µF to 1µF recommended, minimum 500nF for EMI performance) placed close to device input. |+| 2 | EN | input | Enable logic input pin with VIL = 0.7V maximum for disabling and VIH = 2V minimum for enabling; must not be left floating due to high input impedance. |+| 3 | GND | power_in | Ground reference pin requiring low-impedance connection to thermal pad for junction-to-ambient thermal resistance of 29.7°C/W in KVU package. |+| 4 | FB/NC | unconnected | No-connect pin in fixed 5V output configuration; can be left floating or tied to GND. |+| 5 | OUT | output | Regulated output voltage pin providing fixed 5V; requires output capacitor (2.2µF to 220µF with ESR 1mΩ to 2Ω) placed close to device for stability. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TO-252-4 |+| Category | Power Management (PMIC) |+| Pins | 5 |++## CAD (KiCad official)++- Symbol: `TPS7B8650QKVURQ1`+- Footprint: `Package_TO_SOT_SMD:TO-252-4`+- 3D model: TO-252-4 (KiCad packages3D, STEP)+- 3D model files: `tps7b8650qkvurq1-etched.step` / `tps7b8650qkvurq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7b8650qkvurq1.step` / `tps7b8650qkvurq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7b86-q1) (50 pp, sha256 `0baf626088ed686a`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps7b8650qkvurq1-datasheet.pdf)
page.jsonadded+143@@ -0,0 +1,143 @@+{+ "slug": "tps7b8650qkvurq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TO-252-4. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps7b8650qkvurq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps7b8650qkvurq1.kicad_sym",+ "tps7b8650qkvurq1.kicad_mod",+ "tps7b8650qkvurq1.glb",+ "tps7b8650qkvurq1.step",+ "tps7b8650qkvurq1.lbr",+ "docs/hero.png",+ "docs/tps7b8650qkvurq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps7b8650qkvurq1-hero.glb",+ "tps7b8650qkvurq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS7B8650QKVURQ1",+ "manufacturer": "Texas Instruments",+ "package": "TO-252-4",+ "pin_count": 5,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps7b86-q1",+ "parts": {+ "symbol": "tps7b8650qkvurq1.kicad_sym",+ "footprint": "tps7b8650qkvurq1.kicad_mod",+ "model_3d": "tps7b8650qkvurq1-hero.glb",+ "model_3d_plain": "tps7b8650qkvurq1.glb",+ "model_3d_step": "tps7b8650qkvurq1-etched.step",+ "model_3d_step_plain": "tps7b8650qkvurq1.step",+ "lbr": "tps7b8650qkvurq1.lbr"+ },+ "distributor_links": {+ "lcsc": 3744720,+ "digikey": "296-TPS7B8650QKVURQ1TR-ND",+ "mouser": "595-TPS7B8650QKVURQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T09:01:36Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS7B8650QKVURQ1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS7B8650QKVURQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "IN",+ "type": "power_in",+ "description": "Input power voltage pin accepting 3V to 40V with ceramic decoupling capacitor (0.1µF to 1µF recommended, minimum 500nF for EMI performance) placed close to device input."+ },+ {+ "number": "2",+ "name": "EN",+ "type": "input",+ "description": "Enable logic input pin with VIL = 0.7V maximum for disabling and VIH = 2V minimum for enabling; must not be left floating due to high input impedance."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference pin requiring low-impedance connection to thermal pad for junction-to-ambient thermal resistance of 29.7°C/W in KVU package."+ },+ {+ "number": "4",+ "name": "FB/NC",+ "type": "unconnected",+ "description": "No-connect pin in fixed 5V output configuration; can be left floating or tied to GND."+ },+ {+ "number": "5",+ "name": "OUT",+ "type": "output",+ "description": "Regulated output voltage pin providing fixed 5V; requires output capacitor (2.2µF to 220µF with ESR 1mΩ to 2Ω) placed close to device for stability."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package designation discrepancy: hint specifies TO-252-4, but packaging addendum (PAGE 34) confirms ",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 29,+ "cost_usd": 0.2337,+ "at": "2026-10-03T09:01:14"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps7b86-q1",+ "pages": 50,+ "sha256": "0baf626088ed686a",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 5,+ "described": 5,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}