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TPS7B7033QPWPRQ1
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+54@@ -0,0 +1,54 @@+# TPS7B7033QPWPRQ1++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-16++TPS7B7033QPWPRQ1 from Texas Instruments, in a HTSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN | power_in | Unregulated device input supply; the datasheet recommends 4 V to 40 V, with absolute maximum of 45 V. |+| 2 | EN | input | Enable input, high-voltage tolerant up to VIN: a level above 2 V (VIH) enables the regulator and a level below 0.7 V (VIL) disables it. |+| 3 | GND | power_in | Ground reference. |+| 4 | GND | power_in | Ground reference. |+| 5 | GND | power_in | Ground reference. |+| 6 | GND | power_in | Ground reference. |+| 7 | GND | power_in | Ground reference. |+| 8 | DELAY | output | Power-good delay adjustment pin; a capacitor from this pin to ground sets the power-good delay, and if left open the fixed delay t(DLY_FIX) applies. Absolute maximum is 7 V. |+| 9 | GND | power_in | Ground reference. |+| 10 | GND | power_in | Ground reference. |+| 11 | VINT | input | Internal voltage rail; tie above 2 V for lowest IGND, with absolute maximum of 7 V. |+| 12 | GND | power_in | Ground reference. |+| 13 | GND | power_in | Ground reference. |+| 14 | PG | output | Open-drain power-good output, pulled up to VOUT or a reference through a resistor and pulled low to ground when the output is not ready; rated 0 V to 5.5 V recommended. |+| 15 | PGADJ | output | Power-good threshold adjustment; a resistor divider between PGADJ and OUT sets the threshold, and tying it to ground selects the default 91.6% of VOUT threshold, with a 1.1 V internal reference. |+| 16 | OUT | power_out | Regulated 3.3 V or 5 V output; recommended operating range 0 V to 5.5 V with output current up to 300 mA. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-16 |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `TPS7B7033QPWPRQ1`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `tps7b7033qpwprq1-etched.step` / `tps7b7033qpwprq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7b7033qpwprq1.step` / `tps7b7033qpwprq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps7b70-q1) (25 pp, sha256 `6955cc70e8bc9b62`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps7b7033qpwprq1-datasheet.pdf)
page.jsonadded+255@@ -0,0 +1,255 @@+{+ "slug": "tps7b7033qpwprq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps7b7033qpwprq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps7b7033qpwprq1.kicad_sym",+ "tps7b7033qpwprq1.kicad_mod",+ "tps7b7033qpwprq1.glb",+ "tps7b7033qpwprq1.step",+ "tps7b7033qpwprq1.lbr",+ "docs/hero.png",+ "docs/tps7b7033qpwprq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps7b7033qpwprq1-hero.glb",+ "tps7b7033qpwprq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS7B7033QPWPRQ1",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-16",+ "pin_count": 17,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps7b70-q1",+ "parts": {+ "symbol": "tps7b7033qpwprq1.kicad_sym",+ "footprint": "tps7b7033qpwprq1.kicad_mod",+ "model_3d": "tps7b7033qpwprq1-hero.glb",+ "model_3d_plain": "tps7b7033qpwprq1.glb",+ "model_3d_step": "tps7b7033qpwprq1-etched.step",+ "model_3d_step_plain": "tps7b7033qpwprq1.step",+ "lbr": "tps7b7033qpwprq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C523800",+ "digikey": "296-53229-2-ND",+ "mouser": "595-TPS7B7033QPWPRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T23:44:56Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-53229-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS7B7033QPWPRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "IN",+ "type": "power_in",+ "description": "Unregulated device input supply; the datasheet recommends 4 V to 40 V, with absolute maximum of 45 V."+ },+ {+ "number": "2",+ "name": "EN",+ "type": "input",+ "description": "Enable input, high-voltage tolerant up to VIN: a level above 2 V (VIH) enables the regulator and a level below 0.7 V (VIL) disables it."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "8",+ "name": "DELAY",+ "type": "output",+ "description": "Power-good delay adjustment pin; a capacitor from this pin to ground sets the power-good delay, and if left open the fixed delay t(DLY_FIX) applies. Absolute maximum is 7 V."+ },+ {+ "number": "9",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "11",+ "name": "VINT",+ "type": "input",+ "description": "Internal voltage rail; tie above 2 V for lowest IGND, with absolute maximum of 7 V."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "13",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "14",+ "name": "PG",+ "type": "output",+ "description": "Open-drain power-good output, pulled up to VOUT or a reference through a resistor and pulled low to ground when the output is not ready; rated 0 V to 5.5 V recommended."+ },+ {+ "number": "15",+ "name": "PGADJ",+ "type": "output",+ "description": "Power-good threshold adjustment; a resistor divider between PGADJ and OUT sets the threshold, and tying it to ground selects the default 91.6% of VOUT threshold, with a 1.1 V internal reference."+ },+ {+ "number": "16",+ "name": "OUT",+ "type": "power_out",+ "description": "Regulated 3.3 V or 5 V output; recommended operating range 0 V to 5.5 V with output current up to 300 mA."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet classifies DELAY and PGADJ as 'O', but they are timing and threshold-setting pins that; The PowerPAD (exposed thermal pad) is not a numbered pin in the datasheet, so it is omitted from the; The datasheet covers the TPS7B70-Q1 family with 3.3 V and 5 V fixed-output options. The orderable TP",+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 25,+ "cost_usd": 0.1066,+ "at": "2026-10-07T23:44:37"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps7b70-q1",+ "pages": 25,+ "sha256": "6955cc70e8bc9b62",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps7b7033qpwprq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps7b7033qpwprq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "cb493e6f0e79a161681191ab08462f9d568a80240bb22a8acedaca017dd0aa62",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}