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Initial commit: component/tps7a7001ddar

Ray ·1ecda7ae39 ·1mo ago
2 files changed +85
README.mdadded+51
@@ -0,0 +1,51 @@+# TPS7A7001DDAR++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8-EP++TPS7A7001DDAR from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NC | unconnected | Not internally connected. Recommended to connect NC pins to large-area planes for improved thermal performance. |+| 2 | EN | input | Enable input. Pulling this pin below 0.5 V turns the regulator off (VIL_EN max 0.5 V, VIH_EN min 1.1 V). Connect to VIN if not being used. EN pin input current is 0.2 uA max at VEN = 0 V. |+| 3 | IN | power_in | Unregulated supply voltage pin (1.425 V to 6.5 V). It is recommended to connect an input capacitor (CIN) to this pin for stable operation. |+| 4 | NC | unconnected | Not internally connected. Recommended to connect NC pins to large-area planes for improved thermal performance. |+| 5 | NC | unconnected | Not internally connected. Recommended to connect NC pins to large-area planes for improved thermal performance. |+| 6 | OUT | power_out | Regulated output pin (adjustable from 0.5 V, up to 2 A). A 4.7-uF or larger output capacitor (COUT) of any type is required for stability. Dropout is 380 mV max at IOUT = 2 A. |+| 7 | FB | input | Output-voltage feedback input from the external divider (R1/R2). Internal reference VREF = 0.500 V (0.490 V to 0.510 V). Use 10 kOhm <= R1, R2 <= 50 kOhm. FB pin bias current is 1 uA max. |+| 8 | GND | power_in | Device ground return. GND pin current is typically <3 mA under load and 5 uA max in shutdown. |+| 9 | PowerPAD | passive | Exposed thermal pad on the underside of the SOIC-8 package. Strongly recommended to connect to a large-area ground plane; may alternatively be connected to an electrically floating dedicated thermal plane. Junction-to-case (bottom) thermal resistance is 6.8 degC/W. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++Same part, different packaging or reel option.++- `TPS7A7001DDAR`++## CAD (KiCad official)++- Symbol: `TPS7A7001DDAR`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`+- 3D model: SOIC-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps7a7001ddar.pdf) (16 pp, sha256 `d65f218b7030737a`, retrieved 2026-08-17, tier: manufacturer)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps7a7001ddar-datasheet.pdf)
page.jsonadded+34
@@ -0,0 +1,34 @@+{+  "slug": "tps7a7001ddar",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "tps7a7001ddar"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps7a7001ddar.kicad_sym",+    "tps7a7001ddar.kicad_mod",+    "tps7a7001ddar.glb",+    "tps7a7001ddar.step",+    "tps7a7001ddar.lbr",+    "docs/hero.png",+    "docs/tps7a7001ddar-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file