component
TPS7A4701
Public Made by Adomby adom
TI ultra-low-noise, high-PSRR LDO, VQFN-20. 36 V in, 1 A, pin-programmable output, 4 uVrms noise. Datasheet-verified.
← Commit history
tps7a47: datasheet-first component page (KiCad sym+mod+step+lbr, hero, viewers)
1 file changed
+200−8
page.json+200−8@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "tps7a47",+ "title": "TPS7A4701",+ "brief": "TI ultra-low-noise, high-PSRR LDO, VQFN-20. 36 V in, 1 A, pin-programmable output, 4 uVrms noise. Datasheet-verified.", "version": "0.1.0",- "type": "component",- "description": "TI ultra-low-noise, high-PSRR LDO, VQFN-20. 36 V in, 1 A, pin-programmable output, 4 uVrms noise. Datasheet-verified.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "power",@@ -12,6 +15,200 @@ "vqfn-20", "texas-instruments" ],+ "component": {+ "mpn": "TPS7A4701",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-20",+ "pin_count": 21,+ "category": "Power Management",+ "subcategory": "LDO regulator",+ "datasheet": "https://www.ti.com/lit/ds/symlink/tps7a47.pdf",+ "parts": {+ "symbol": "tps7a47.kicad_sym",+ "footprint": "tps7a47.kicad_mod",+ "model_3d": "tps7a47.glb",+ "model_3d_step": "tps7a47.step",+ "lbr": "tps7a47.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "OUT",+ "type": "power_out",+ "description": "Regulator output. Tie a \u226510 \u00b5F (47 \u00b5F ceramic recommended) capacitor from OUT to GND close to the device for stability and best AC performance. Pin 1 and pin 20 are internally connected and must be tied together."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. May be left open or tied to any voltage between GND and IN."+ },+ {+ "number": "3",+ "name": "SENSE/FB",+ "type": "input",+ "description": "Control-loop error amplifier input (TPS7A4701 only). Acts as SENSE when using ANY-OUT programming (tie to OUT at point of load) or as FB when using an external resistor divider for adjustable operation up to 34V."+ },+ {+ "number": "4",+ "name": "6P4V2",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 6.4 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "5",+ "name": "6P4V1",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 6.4 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "6",+ "name": "3P2V",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 3.2 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground. Internally connected to the thermal pad."+ },+ {+ "number": "8",+ "name": "1P6V",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 1.6 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "9",+ "name": "0P8V",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 0.8 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "10",+ "name": "0P4V",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 0.4 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "11",+ "name": "0P2V",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 0.2 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "12",+ "name": "0P1V",+ "type": "input",+ "description": "ANY-OUT output-voltage programming pin. Tie to GND to add 0.1 V to the nominal output voltage. Leave floating if unused. Do not connect to any voltage other than GND."+ },+ {+ "number": "13",+ "name": "EN",+ "type": "input",+ "description": "Enable. Device is enabled when VEN exceeds VEN(HI). Absolute max 36 V to GND. Tie to IN if enable control is not required."+ },+ {+ "number": "14",+ "name": "NR",+ "type": "passive",+ "description": "Noise reduction pin. Connect a \u226510 nF capacitor from NR to GND (1 \u00b5F recommended, placed close to the device) to reduce output RMS noise to the 4 \u00b5VRMS spec and stabilize the reference."+ },+ {+ "number": "15",+ "name": "IN",+ "type": "power_in",+ "description": "Input supply (+3 V to +36 V). Tie a \u22651 \u00b5F capacitor from IN to GND for stability; 10 \u00b5F is recommended, placed close to the device. Pins 15 and 16 are internally connected."+ },+ {+ "number": "16",+ "name": "IN",+ "type": "power_in",+ "description": "Input supply (+3 V to +36 V). Tie a \u22651 \u00b5F capacitor from IN to GND for stability; 10 \u00b5F is recommended. Pins 15 and 16 are internally connected."+ },+ {+ "number": "17",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. May be left open or tied to any voltage between GND and IN."+ },+ {+ "number": "18",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. May be left open or tied to any voltage between GND and IN."+ },+ {+ "number": "19",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. May be left open or tied to any voltage between GND and IN."+ },+ {+ "number": "20",+ "name": "OUT",+ "type": "power_out",+ "description": "Regulator output. Tie a \u226510 \u00b5F (47 \u00b5F ceramic recommended) capacitor from OUT to GND close to the device. Pin 1 and pin 20 are internally connected and must be tied together."+ },+ {+ "number": "21",+ "name": "GND",+ "type": "power_in",+ "description": "Thermal pad. Internally connected to GND. Solder to a large-area ground plane for proper thermal performance and electrical grounding."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/tps7a47.pdf",+ "pages": 32,+ "sha256": "8ca46a9968923d2e",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Type": "Ultra-low-noise LDO",+ "Input": "3-36 V",+ "Output": "1.4-20.5 V (pin-programmable)",+ "Output current": "1 A",+ "Noise": "4.17 uVrms (10 Hz-100 kHz)",+ "PSRR": "High across frequency",+ "Package": "VQFN-20"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "tps7a4701",+ "ultra low noise ldo",+ "high psrr regulator",+ "clean supply for adc"+ ],+ "discovery_pitch": "TI TPS7A4701 ultra-low-noise high-PSRR LDO (VQFN-20) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -29,10 +226,5 @@ "docs/tps7a47-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }