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Initial commit: component/tps7a4301dgqr

Ray ·00a1a966c8 ·1d ago
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README.mdadded+46
@@ -0,0 +1,46 @@+# TPS7A4301DGQR++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-10++TPS7A4301DGQR from Texas Instruments, in a MSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | output | Output pin that needs a capacitor to ground for stability, with COUT of 1 μF to 100 μF (2.2 μF nominal recommended) placed close to the OUT and GND pins. |+| 2 | FB | input | Feedback input to the control-loop error amplifier that sets the OUT voltage through external resistors (adjustable version only) and must not be left floating. |+| 3 | PG | output | Open-drain power-good output that indicates when the output reaches VIT(PG, RISING); a pullup resistor must limit sink current, VPG is rated up to 18 V, and the pin may be left floating if unused. |+| 4 | MVSEL1 | input | MID_OUT voltage-select input that works with MVSEL2 to set VMID_OUT (10 V, 12 V, or 15 V); it must not float and should be tied to GND if not used, with a recommended maximum of 18 V. |+| 5 | GND | power_in | Ground pin for the device, which should be connected to a large-area GND plane for thermal performance. |+| 6 | EN | input | Precision enable pin that enables the device above VEN(HI) and disables it below VEN(LOW), can be left floating due to an internal pullup, and must not exceed 18 V if tied to IN. |+| 7 | MVSEL2 | input | MID_OUT voltage-select input that works with MVSEL1 to set VMID_OUT (10 V, 12 V, or 15 V); it must not float and should be tied to GND if not used, with a recommended maximum of 18 V. |+| 8 | MID_OUT | output | MID output pin that requires a capacitor to ground for stability, with CMID_OUT at least 3 × COUT to maintain stability and VMID_OUT of 10 V to 15 V. |+| 9 | NC | unconnected | No internal connection; this pin must be left floating to observe the high-voltage clearance between the IN and MID_OUT pins. |+| 10 | IN | input | Input pin with a supply range of 4 V to 85 V that requires a ceramic capacitor of at least 0.1 μF to ground placed as close to the IN and GND pins as possible. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | MSOP-10 |+| Category | Power Management (PMIC) |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `TPS7A4301DGQR`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: MSOP-10 (KiCad packages3D, STEP)+- 3D model files: `tps7a4301dgqr-etched.step` / `tps7a4301dgqr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps7a4301dgqr.step` / `tps7a4301dgqr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600396860985126912) (37 pp, sha256 `6ab8280bee821dc9`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps7a4301dgqr-datasheet.pdf)
page.jsonadded+212
@@ -0,0 +1,212 @@+{+  "slug": "tps7a4301dgqr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps7a4301dgqr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps7a4301dgqr.kicad_sym",+    "tps7a4301dgqr.kicad_mod",+    "tps7a4301dgqr.glb",+    "tps7a4301dgqr.step",+    "tps7a4301dgqr.lbr",+    "docs/hero.png",+    "docs/tps7a4301dgqr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps7a4301dgqr-hero.glb",+    "tps7a4301dgqr-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS7A4301DGQR",+    "manufacturer": "Texas Instruments",+    "package": "MSOP-10",+    "pin_count": 10,+    "category": "Power Management (PMIC)",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600396860985126912",+    "parts": {+      "symbol": "tps7a4301dgqr.kicad_sym",+      "footprint": "tps7a4301dgqr.kicad_mod",+      "model_3d": "tps7a4301dgqr-hero.glb",+      "model_3d_plain": "tps7a4301dgqr.glb",+      "model_3d_step": "tps7a4301dgqr-etched.step",+      "model_3d_step_plain": "tps7a4301dgqr.step",+      "lbr": "tps7a4301dgqr.lbr"+    },+    "distributor_links": {+      "lcsc": "C7125593",+      "digikey": "296-TPS7A4301DGQRTR-ND",+      "mouser": "595-TPS7A4301DGQR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T02:47:39Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-TPS7A4301DGQRTR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS7A4301DGQR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OUT",+        "type": "output",+        "description": "Output pin that needs a capacitor to ground for stability, with COUT of 1 μF to 100 μF (2.2 μF nominal recommended) placed close to the OUT and GND pins."+      },+      {+        "number": "2",+        "name": "FB",+        "type": "input",+        "description": "Feedback input to the control-loop error amplifier that sets the OUT voltage through external resistors (adjustable version only) and must not be left floating."+      },+      {+        "number": "3",+        "name": "PG",+        "type": "output",+        "description": "Open-drain power-good output that indicates when the output reaches VIT(PG, RISING); a pullup resistor must limit sink current, VPG is rated up to 18 V, and the pin may be left floating if unused."+      },+      {+        "number": "4",+        "name": "MVSEL1",+        "type": "input",+        "description": "MID_OUT voltage-select input that works with MVSEL2 to set VMID_OUT (10 V, 12 V, or 15 V); it must not float and should be tied to GND if not used, with a recommended maximum of 18 V."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Ground pin for the device, which should be connected to a large-area GND plane for thermal performance."+      },+      {+        "number": "6",+        "name": "EN",+        "type": "input",+        "description": "Precision enable pin that enables the device above VEN(HI) and disables it below VEN(LOW), can be left floating due to an internal pullup, and must not exceed 18 V if tied to IN."+      },+      {+        "number": "7",+        "name": "MVSEL2",+        "type": "input",+        "description": "MID_OUT voltage-select input that works with MVSEL1 to set VMID_OUT (10 V, 12 V, or 15 V); it must not float and should be tied to GND if not used, with a recommended maximum of 18 V."+      },+      {+        "number": "8",+        "name": "MID_OUT",+        "type": "output",+        "description": "MID output pin that requires a capacitor to ground for stability, with CMID_OUT at least 3 × COUT to maintain stability and VMID_OUT of 10 V to 15 V."+      },+      {+        "number": "9",+        "name": "NC",+        "type": "unconnected",+        "description": "No internal connection; this pin must be left floating to observe the high-voltage clearance between the IN and MID_OUT pins."+      },+      {+        "number": "10",+        "name": "IN",+        "type": "input",+        "description": "Input pin with a supply range of 4 V to 85 V that requires a ceramic capacitor of at least 0.1 μF to ground placed as close to the IN and GND pins as possible."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The MPN suffix '01' denotes the adjustable output version (datasheet Table 9-1), so the adjustable D; The thermal pad is listed in Table 5-1 as an exposed pad with no printed pin number, so it is omitte; Pin 9 is NC in the adjustable version and is typed as unconnected. The datasheet says it must be lef"+        ],+        "pages_sent": 9,+        "cost_usd": 0.0631,+        "at": "2026-10-08T02:47:22"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8600396860985126912",+        "pages": 37,+        "sha256": "6ab8280bee821dc9",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 10,+        "described": 10,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tps7a4301dgqr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.9,+          3,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "b8f88eac3ce221c2ccb0b5048f9ad49c2ef4af148f8ae50c4e232e357683f547",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps7a4301dgqr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          4.9,+          3,+          1.1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "b47f796d1ce3fdb52bc0233c7f205c581026189255daa3e3976d59fefa13788a",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file