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Initial commit: component/tps76825qd

Ray ·538db08b7a ·1d ago
2 files changed +244
README.mdadded+44
@@ -0,0 +1,44 @@+# TPS76825QD++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8++TPS76825QD from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Regulator ground pin, which is the common return for the regulator. |+| 2 | EN | input | Enable input; a TTL high signal shuts the regulator down and EN should be tied to ground if the shutdown feature is not used. |+| 3 | IN | power_in | Input voltage pin; the datasheet's recommended input range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. Pins 3 and 4 are both IN. |+| 4 | IN | power_in | Input voltage pin; the datasheet's recommended input range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. Pins 3 and 4 are both IN. |+| 5 | OUT | power_out | Regulated output voltage pin; a capacitor of at least 10 µF with ESR between 60 mΩ and 1.5 Ω is required between OUT and GND. |+| 6 | OUT | power_out | Regulated output voltage pin; a capacitor of at least 10 µF with ESR between 60 mΩ and 1.5 Ω is required between OUT and GND. Pins 5 and 6 are both OUT. |+| 7 | FB/NC | unconnected | Feedback input for the adjustable version only; on the fixed-output TPS76825 it is a no-connect pin. |+| 8 | PG | output | Open-drain power-good output that goes low when the output falls to between 92% and 98% of nominal and requires an external pullup resistor, or can be left floating if unused. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TPS76825QD`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `tps76825qd-etched.step` / `tps76825qd-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76825qd.step` / `tps76825qd.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps768) (31 pp, sha256 `742896d0a1cf7766`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps76825qd-datasheet.pdf)
page.jsonadded+200
@@ -0,0 +1,200 @@+{+  "slug": "tps76825qd",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps76825qd",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps76825qd.kicad_sym",+    "tps76825qd.kicad_mod",+    "tps76825qd.glb",+    "tps76825qd.step",+    "tps76825qd.lbr",+    "docs/hero.png",+    "docs/tps76825qd-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps76825qd-hero.glb",+    "tps76825qd-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS76825QD",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps768",+    "parts": {+      "symbol": "tps76825qd.kicad_sym",+      "footprint": "tps76825qd.kicad_mod",+      "model_3d": "tps76825qd-hero.glb",+      "model_3d_plain": "tps76825qd.glb",+      "model_3d_step": "tps76825qd-etched.step",+      "model_3d_step_plain": "tps76825qd.step",+      "lbr": "tps76825qd.lbr"+    },+    "distributor_links": {+      "lcsc": "C2862357",+      "digikey": "2156-TPS76825QD-ND",+      "mouser": "595-TPS76825QD"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T20:54:37Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "2156-TPS76825QD-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS76825QD",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "GND",+        "type": "power_in",+        "description": "Regulator ground pin, which is the common return for the regulator."+      },+      {+        "number": "2",+        "name": "EN",+        "type": "input",+        "description": "Enable input; a TTL high signal shuts the regulator down and EN should be tied to ground if the shutdown feature is not used."+      },+      {+        "number": "3",+        "name": "IN",+        "type": "power_in",+        "description": "Input voltage pin; the datasheet's recommended input range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. Pins 3 and 4 are both IN."+      },+      {+        "number": "4",+        "name": "IN",+        "type": "power_in",+        "description": "Input voltage pin; the datasheet's recommended input range is 2.7 V to 10 V, with VIN at least VOUT + VDO or 2.7 V, whichever is greater. Pins 3 and 4 are both IN."+      },+      {+        "number": "5",+        "name": "OUT",+        "type": "power_out",+        "description": "Regulated output voltage pin; a capacitor of at least 10 µF with ESR between 60 mΩ and 1.5 Ω is required between OUT and GND."+      },+      {+        "number": "6",+        "name": "OUT",+        "type": "power_out",+        "description": "Regulated output voltage pin; a capacitor of at least 10 µF with ESR between 60 mΩ and 1.5 Ω is required between OUT and GND. Pins 5 and 6 are both OUT."+      },+      {+        "number": "7",+        "name": "FB/NC",+        "type": "unconnected",+        "description": "Feedback input for the adjustable version only; on the fixed-output TPS76825 it is a no-connect pin."+      },+      {+        "number": "8",+        "name": "PG",+        "type": "output",+        "description": "Open-drain power-good output that goes low when the output falls to between 92% and 98% of nominal and requires an external pullup resistor, or can be left floating if unused."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The SOIC-8 pin table is on page 4; the input voltage limits (2.7 V to 10 V) and the output capacitor; Pin 7 is listed as FB/NC. For the fixed-output TPS76825QD it is a no-connect; the feedback function ; The PG pin is an open-drain output. The KiCad class 'output' was used because the enum does not incl"+        ],+        "pages_sent": 13,+        "cost_usd": 0.0866,+        "at": "2026-10-08T20:54:18"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps768",+        "pages": 31,+        "sha256": "742896d0a1cf7766",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tps76825qd.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps76825qd-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "5c55f353ac1aef97dac17619bb7f0aa98a3737680dbeed95289930e498582f74",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file