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TPS76625D
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# TPS76625D++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8++TPS76625D from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NC/FB | passive | Fixed version: not internally connected, so leave open or tie to ground for improved thermal performance (adjustable version uses this pin as FB and must not float). |+| 2 | PG | output | Power-good output is open-drain and requires a pullup resistor; if power-good is not used, ground this pin or leave it floating. |+| 3 | GND | power_in | Ground pin; the input and output capacitor ground returns should be placed as close to this pin as possible. |+| 4 | EN | input | Enable pin: driving it low enables the device and driving it high disables it, with low and high thresholds given in the Electrical Characteristics table. |+| 5 | IN | power_in | Input pin; use the recommended input capacitor value from Recommended Operating Conditions and place the capacitor as close to the IN and GND pins as possible. |+| 6 | IN | power_in | Input pin (second IN pin, bonded in parallel with pin 5); use the recommended input capacitor value from Recommended Operating Conditions and place the capacitor as close to the IN and GND pins as possible. |+| 7 | OUT | power_out | Output pin; use the recommended output capacitor value from Recommended Operating Conditions and place the capacitor as close to the OUT and GND pins as possible. |+| 8 | OUT | power_out | Output pin (second OUT pin, bonded in parallel with pin 7); use the recommended output capacitor value from Recommended Operating Conditions and place the capacitor as close to the OUT and GND pins as possible. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TPS76625D`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `tps76625d-etched.step` / `tps76625d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps76625d.step` / `tps76625d.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps766) (45 pp, sha256 `43cfa370a86e4a2d`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps76625d-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "tps76625d",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps76625d",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps76625d.kicad_sym",+ "tps76625d.kicad_mod",+ "tps76625d.glb",+ "tps76625d.step",+ "tps76625d.lbr",+ "docs/hero.png",+ "docs/tps76625d-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps76625d-hero.glb",+ "tps76625d-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS76625D",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps766",+ "parts": {+ "symbol": "tps76625d.kicad_sym",+ "footprint": "tps76625d.kicad_mod",+ "model_3d": "tps76625d-hero.glb",+ "model_3d_plain": "tps76625d.glb",+ "model_3d_step": "tps76625d-etched.step",+ "model_3d_step_plain": "tps76625d.step",+ "lbr": "tps76625d.lbr"+ },+ "distributor_links": {+ "lcsc": "C2870474",+ "digikey": "296-2725-5-ND",+ "mouser": "595-TPS76625D"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T02:42:12Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-2725-5-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS76625D",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NC/FB",+ "type": "passive",+ "description": "Fixed version: not internally connected, so leave open or tie to ground for improved thermal performance (adjustable version uses this pin as FB and must not float)."+ },+ {+ "number": "2",+ "name": "PG",+ "type": "output",+ "description": "Power-good output is open-drain and requires a pullup resistor; if power-good is not used, ground this pin or leave it floating."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; the input and output capacitor ground returns should be placed as close to this pin as possible."+ },+ {+ "number": "4",+ "name": "EN",+ "type": "input",+ "description": "Enable pin: driving it low enables the device and driving it high disables it, with low and high thresholds given in the Electrical Characteristics table."+ },+ {+ "number": "5",+ "name": "IN",+ "type": "power_in",+ "description": "Input pin; use the recommended input capacitor value from Recommended Operating Conditions and place the capacitor as close to the IN and GND pins as possible."+ },+ {+ "number": "6",+ "name": "IN",+ "type": "power_in",+ "description": "Input pin (second IN pin, bonded in parallel with pin 5); use the recommended input capacitor value from Recommended Operating Conditions and place the capacitor as close to the IN and GND pins as possible."+ },+ {+ "number": "7",+ "name": "OUT",+ "type": "power_out",+ "description": "Output pin; use the recommended output capacitor value from Recommended Operating Conditions and place the capacitor as close to the OUT and GND pins as possible."+ },+ {+ "number": "8",+ "name": "OUT",+ "type": "power_out",+ "description": "Output pin (second OUT pin, bonded in parallel with pin 7); use the recommended output capacitor value from Recommended Operating Conditions and place the capacitor as close to the OUT and GND pins as possible."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet covers the TPS766 family, not the TPS76625 alone. Pin 1 is labelled NC/FB, and the TPS; The datasheet's pin table labels IN and OUT as I and O. I mapped them to KiCad power_in and power_ou; The datasheet does not state which of the legacy or new chip revisions the TPS76625D orderable corre"+ ],+ "pages_sent": 12,+ "cost_usd": 0.0657,+ "at": "2026-10-08T02:41:57"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps766",+ "pages": 45,+ "sha256": "43cfa370a86e4a2d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps76625d.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps76625d-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "6e0d2f3d2a2f19d24055af22795971ce19dadf70c42d21e1b8facefe47eb6b48",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}