component
TPS71745DSER
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+43@@ -0,0 +1,43 @@+# TPS71745DSER++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6(1.5x1.5)++TPS71745DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | power_out | Regulated output voltage; a minimum of 1 µF capacitance from this pin to ground is required for stability. |+| 2 | GND | power_in | Ground pin; per the layout guidance, the VIN and VOUT ground planes should connect only at this pin and the bypass capacitor ground should connect directly to it. |+| 3 | NR | passive | Fixed-voltage versions only; the noise reduction capacitor filters band-gap noise to lower output noise (an optional 0.01 µF ceramic is shown in the typical application). |+| 4 | EN | input | Driving EN above VEN(high) turns the regulator on and driving it below VEN(low) puts it in standby; VEN must stay within 0 V to VIN, its absolute maximum is VIN + 0.3 V or 7 V (whichever is greater), and the pin must not be left floating. |+| 5 | N/C | unconnected | Not connected internally; this pin can be tied to ground to improve thermal dissipation. |+| 6 | IN | power_in | Input supply to the device, operating from 2.5 V to 6.5 V, with a 0.1 µF to 1 µF capacitor recommended for better performance. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-6(1.5x1.5) |+| Category | Power Management (PMIC) |+| Pins | 6 |++## CAD (KiCad official)++- Symbol: `TPS71745DSER`+- Footprint: `Package_SON:WSON-6_1.5x1.5mm_P0.5mm`+- 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)+- 3D model files: `tps71745dser-etched.step` / `tps71745dser-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps71745dser.step` / `tps71745dser.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps717) (45 pp, sha256 `9d6a9da698418596`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps71745dser-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps71745dser",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps71745dser.kicad_sym",+ "tps71745dser.kicad_mod",+ "tps71745dser.glb",+ "tps71745dser.step",+ "tps71745dser.lbr",+ "docs/hero.png",+ "docs/tps71745dser-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps71745dser-hero.glb",+ "tps71745dser-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS71745DSER",+ "manufacturer": "Texas Instruments",+ "package": "WSON-6(1.5x1.5)",+ "pin_count": 6,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps717",+ "parts": {+ "symbol": "tps71745dser.kicad_sym",+ "footprint": "tps71745dser.kicad_mod",+ "model_3d": "tps71745dser-hero.glb",+ "model_3d_plain": "tps71745dser.glb",+ "model_3d_step": "tps71745dser-etched.step",+ "model_3d_step_plain": "tps71745dser.step",+ "lbr": "tps71745dser.lbr"+ },+ "distributor_links": {+ "lcsc": "C2860494",+ "digikey": "296-24285-2-ND",+ "mouser": "595-TPS71745DSER"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:45:40Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-24285-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS71745DSER",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "OUT",+ "type": "power_out",+ "description": "Regulated output voltage; a minimum of 1 µF capacitance from this pin to ground is required for stability."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin; per the layout guidance, the VIN and VOUT ground planes should connect only at this pin and the bypass capacitor ground should connect directly to it."+ },+ {+ "number": "3",+ "name": "NR",+ "type": "passive",+ "description": "Fixed-voltage versions only; the noise reduction capacitor filters band-gap noise to lower output noise (an optional 0.01 µF ceramic is shown in the typical application)."+ },+ {+ "number": "4",+ "name": "EN",+ "type": "input",+ "description": "Driving EN above VEN(high) turns the regulator on and driving it below VEN(low) puts it in standby; VEN must stay within 0 V to VIN, its absolute maximum is VIN + 0.3 V or 7 V (whichever is greater), and the pin must not be left floating."+ },+ {+ "number": "5",+ "name": "N/C",+ "type": "unconnected",+ "description": "Not connected internally; this pin can be tied to ground to improve thermal dissipation."+ },+ {+ "number": "6",+ "name": "IN",+ "type": "power_in",+ "description": "Input supply to the device, operating from 2.5 V to 6.5 V, with a 0.1 µF to 1 µF capacitor recommended for better performance."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The DSE (WSON-6) package has an exposed thermal pad shown in the layout figures, but the datasheet p; The datasheet pin table labels pin 3 as 'NR/FB' for all variants. For the fixed-voltage TPS71745 the"+ ],+ "pages_sent": 15,+ "cost_usd": 0.1075,+ "at": "2026-10-08T18:45:12"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps717",+ "pages": 45,+ "sha256": "9d6a9da698418596",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps71745dser.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 1.5,+ 1.48,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b286efb19ee878f7094913552ef4b3d65067278c4f8bce5547303f697797652f",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps71745dser-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 1.5,+ 1.48,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "62efc4ea9c3715526ca7de2668c05e51123b5f2bba36f8a09ba826c37287dbbf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}