component
TPS70933DRVRM3
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# TPS70933DRVRM3++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)++TPS70933DRVRM3 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT | power_out | Regulated output voltage; connect a small 2.2-µF or greater ceramic capacitor from this pin to ground to assure stability. |+| 2 | NC | unconnected | No internal connection. |+| 3 | GND | power_in | Ground. |+| 4 | EN | input | Enable pin: drive high to enable the device, drive low for low current shutdown, may be left floating to enable the device, and the maximum voltage must remain below 6.5 V. |+| 5 | NC | unconnected | No internal connection. |+| 6 | IN | power_in | Unregulated input to the device, rated 2.7 V to 30 V recommended operating range. |+| 7 | GND | power_in | Thermal pad electrically connected to the GND node; connect to the GND plane for improved thermal performance. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-6-EP(2x2) |+| Category | Power Management (PMIC) |+| Pins | 7 |++## CAD (KiCad official)++- Symbol: `TPS70933DRVRM3`+- Footprint: `Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`+- 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)+- 3D model files: `tps70933drvrm3-etched.step` / `tps70933drvrm3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps70933drvrm3.step` / `tps70933drvrm3.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps709) (44 pp, sha256 `18967ac390121fa9`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps70933drvrm3-datasheet.pdf)
page.jsonadded+194@@ -0,0 +1,194 @@+{+ "slug": "tps70933drvrm3",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps70933drvrm3",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps70933drvrm3.kicad_sym",+ "tps70933drvrm3.kicad_mod",+ "tps70933drvrm3.glb",+ "tps70933drvrm3.step",+ "tps70933drvrm3.lbr",+ "docs/hero.png",+ "docs/tps70933drvrm3-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps70933drvrm3-hero.glb",+ "tps70933drvrm3-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS70933DRVRM3",+ "manufacturer": "Texas Instruments",+ "package": "WSON-6-EP(2x2)",+ "pin_count": 7,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps709",+ "parts": {+ "symbol": "tps70933drvrm3.kicad_sym",+ "footprint": "tps70933drvrm3.kicad_mod",+ "model_3d": "tps70933drvrm3-hero.glb",+ "model_3d_plain": "tps70933drvrm3.glb",+ "model_3d_step": "tps70933drvrm3-etched.step",+ "model_3d_step_plain": "tps70933drvrm3.step",+ "lbr": "tps70933drvrm3.lbr"+ },+ "distributor_links": {+ "lcsc": "C2870072",+ "digikey": "296-TPS70933DRVRM3TR-ND",+ "mouser": "595-TPS70933DRVRM3"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T21:30:45Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS70933DRVRM3TR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TPS70933DRVRM3",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "OUT",+ "type": "power_out",+ "description": "Regulated output voltage; connect a small 2.2-µF or greater ceramic capacitor from this pin to ground to assure stability."+ },+ {+ "number": "2",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Ground."+ },+ {+ "number": "4",+ "name": "EN",+ "type": "input",+ "description": "Enable pin: drive high to enable the device, drive low for low current shutdown, may be left floating to enable the device, and the maximum voltage must remain below 6.5 V."+ },+ {+ "number": "5",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "6",+ "name": "IN",+ "type": "power_in",+ "description": "Unregulated input to the device, rated 2.7 V to 30 V recommended operating range."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Thermal pad electrically connected to the GND node; connect to the GND plane for improved thermal performance."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad (DRV package) is listed in the Pin Functions table with no pin number ('—'),; Pins 2 and 5 are both NC (no internal connection) in the DRV package. Both are listed separately, as; The pinout is taken from the TPS709 family datasheet (Table 5-1 DRV column and Figure 5-4). The TPS7",+ "exposed pad 7 added from the footprint"+ ],+ "pages_sent": 15,+ "cost_usd": 0.12,+ "at": "2026-10-07T21:30:29"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps709",+ "pages": 44,+ "sha256": "18967ac390121fa9",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 7,+ "described": 7,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps70933drvrm3.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 2,+ 1.98,+ 0.82+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "a159a524ab16d3406353a16f8c20b59f5679eea26e2d41174628288b5b9da702",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps70933drvrm3-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 2,+ 1.98,+ 0.82+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "32aeb90d2555e8e81eadc9de118200ba691152e57c4bb06da490c2d6b6fa3a6d",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}