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TPS65320DQPWPRQ1
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Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+51@@ -0,0 +1,51 @@+# TPS65320DQPWPRQ1++**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · HTSSOP-14-EP++TPS65320DQPWPRQ1 from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | output | Bootstrap capacitor node requiring 0.1 µF ceramic capacitor to SW pin; provides bias voltage for high-side MOSFET gate driver. |+| 2 | VIN | power_in | Input power supply for buck regulator internal biasing and high-side MOSFET, operating range 3.6 V to 36 V. |+| 3 | VIN_LDO | power_in | Input power supply for LDO regulator, operating range 3 V to 20 V when in regulation. |+| 4 | LDO_OUT | power_out | Linear regulator output voltage adjustable from 1.1 V to 5.5 V using external feedback resistor divider. |+| 5 | FB2 | input | LDO feedback input pin; connect external resistive divider from LDO_OUT to GND to set output voltage. |+| 6 | nRST | output | Active-low push-pull reset output asserted low when LDO_OUT is below 92% nominal and released high when LDO begins regulating. |+| 7 | EN2 | input | LDO enable input (high-voltage tolerant 40 V); internally pulled to ground; drive high to enable LDO regulator. |+| 8 | EN1 | input | Buck enable input (high-voltage tolerant 40 V); internally pulled to ground; drive high to enable buck regulator. |+| 9 | RT/CLK | input | Timing resistor to ground sets switching frequency (100 kHz to 2.5 MHz) or external clock input for PLL synchronization (300 kHz to 2200 kHz). |+| 10 | SS | input | Soft-start capacitor connection to ground charged by internal 2 µA current source; sets output voltage ramp time from 10% to 90% of final value. |+| 11 | FB1 | input | Buck feedback input pin; connect external resistive divider from buck output to GND to set output voltage range 1.1 V to 20 V. |+| 12 | COMP | output | Error amplifier output and peak-current comparator input; connect frequency compensation network (R and C) to GND. |+| 13 | GND | power_in | Ground reference. |+| 14 | SW | output | Switching node connected to external inductor and catch diode; source of internal high-side MOSFET during conduction. |+| 15 | PowerPAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-14-EP |+| Category | Power Management (PMIC) |+| Pins | 15 |++## CAD (KiCad official)++- Symbol: `TPS65320DQPWPRQ1`+- Footprint: `Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)+- 3D model files: `tps65320dqpwprq1-etched.step` / `tps65320dqpwprq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps65320dqpwprq1.step` / `tps65320dqpwprq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps65320d-q1) (45 pp, sha256 `44af3b9d372062ba`, retrieved 2026-09-27, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps65320dqpwprq1-datasheet.pdf)
page.jsonadded+202@@ -0,0 +1,202 @@+{+ "slug": "tps65320dqpwprq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps65320dqpwprq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps65320dqpwprq1.kicad_sym",+ "tps65320dqpwprq1.kicad_mod",+ "tps65320dqpwprq1.glb",+ "tps65320dqpwprq1.step",+ "tps65320dqpwprq1.lbr",+ "docs/hero.png",+ "docs/tps65320dqpwprq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "TPS65320DQPWPRQ1",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-14-EP",+ "pin_count": 15,+ "category": "Power Management (PMIC)",+ "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps65320d-q1",+ "parts": {+ "symbol": "tps65320dqpwprq1.kicad_sym",+ "footprint": "tps65320dqpwprq1.kicad_mod",+ "model_3d": "tps65320dqpwprq1-etched.glb",+ "model_3d_plain": "tps65320dqpwprq1.glb",+ "model_3d_step": "tps65320dqpwprq1-etched.step",+ "model_3d_step_plain": "tps65320dqpwprq1.step",+ "lbr": "tps65320dqpwprq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C523812",+ "digikey": "296-50504-2-ND",+ "mouser": "595-TPS65320DQPWPRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-09-27T09:24:00Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-50504-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS65320DQPWPRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "BOOT",+ "type": "output",+ "description": "Bootstrap capacitor node requiring 0.1 µF ceramic capacitor to SW pin; provides bias voltage for high-side MOSFET gate driver."+ },+ {+ "number": "2",+ "name": "VIN",+ "type": "power_in",+ "description": "Input power supply for buck regulator internal biasing and high-side MOSFET, operating range 3.6 V to 36 V."+ },+ {+ "number": "3",+ "name": "VIN_LDO",+ "type": "power_in",+ "description": "Input power supply for LDO regulator, operating range 3 V to 20 V when in regulation."+ },+ {+ "number": "4",+ "name": "LDO_OUT",+ "type": "power_out",+ "description": "Linear regulator output voltage adjustable from 1.1 V to 5.5 V using external feedback resistor divider."+ },+ {+ "number": "5",+ "name": "FB2",+ "type": "input",+ "description": "LDO feedback input pin; connect external resistive divider from LDO_OUT to GND to set output voltage."+ },+ {+ "number": "6",+ "name": "nRST",+ "type": "output",+ "description": "Active-low push-pull reset output asserted low when LDO_OUT is below 92% nominal and released high when LDO begins regulating."+ },+ {+ "number": "7",+ "name": "EN2",+ "type": "input",+ "description": "LDO enable input (high-voltage tolerant 40 V); internally pulled to ground; drive high to enable LDO regulator."+ },+ {+ "number": "8",+ "name": "EN1",+ "type": "input",+ "description": "Buck enable input (high-voltage tolerant 40 V); internally pulled to ground; drive high to enable buck regulator."+ },+ {+ "number": "9",+ "name": "RT/CLK",+ "type": "input",+ "description": "Timing resistor to ground sets switching frequency (100 kHz to 2.5 MHz) or external clock input for PLL synchronization (300 kHz to 2200 kHz)."+ },+ {+ "number": "10",+ "name": "SS",+ "type": "input",+ "description": "Soft-start capacitor connection to ground charged by internal 2 µA current source; sets output voltage ramp time from 10% to 90% of final value."+ },+ {+ "number": "11",+ "name": "FB1",+ "type": "input",+ "description": "Buck feedback input pin; connect external resistive divider from buck output to GND to set output voltage range 1.1 V to 20 V."+ },+ {+ "number": "12",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output and peak-current comparator input; connect frequency compensation network (R and C) to GND."+ },+ {+ "number": "13",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference."+ },+ {+ "number": "14",+ "name": "SW",+ "type": "output",+ "description": "Switching node connected to external inductor and catch diode; source of internal high-side MOSFET during conduction."+ },+ {+ "number": "15",+ "name": "PowerPAD",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin SW (14) is designated as I/O type 'I' (input) in the datasheet pin function table on page 3, but",+ "exposed pad 15 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 45,+ "cost_usd": 0.4476,+ "at": "2026-09-27T09:23:43"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps65320d-q1",+ "pages": 45,+ "sha256": "44af3b9d372062ba",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 15,+ "described": 15,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}