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TPS65185RGZR
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+86@@ -0,0 +1,86 @@+# TPS65185RGZR++**Texas Instruments** · Power Management - Specialized · VQFN-48-EP(7x7)++TPS65185RGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VREF | power_out | Filter pin for the 2.25-V internal ADC reference; connect a 4.7-µF capacitor from this pin to ground. |+| 2 | INT | output | Open-drain interrupt output, active low. |+| 3 | VNEG | power_out | Negative supply output for panel source drivers; connect a 4.7-µF capacitor from this pin to ground. |+| 4 | VNEG_IN | power_in | Input pin for LDO2 (VNEG); connect a 4.7-µF capacitor from this pin to ground. |+| 5 | WAKEUP | input | Active-high wake-up pin to exit sleep mode; I2C accepts commands once high, but power rails stay disabled until PWRUP is high (93.75-µs deglitch). |+| 6 | DGND | power_in | Digital ground; connect to the ground plane. |+| 7 | INT_LDO | power_out | Filter pin for the 2.7-V internal supply; connect a 4.7-µF capacitor from this pin to ground. |+| 8 | AGND1 | power_in | Analog ground for general analog circuitry. |+| 9 | VNEG_DIS | output | Discharge pin for VNEG; connect to VNEG to discharge it to ground when the rail is disabled, or leave floating if discharge is not wanted. |+| 10 | VIN | power_in | Input power supply for general circuitry (3 V to 6 V recommended input range); connect a 10-µF capacitor from this pin to ground. |+| 11 | N/C | unconnected | Not internally connected. |+| 12 | VCOM_CTRL | input | VCOM enable: pull high to enable the VCOM amplifier; when pulled low with VN enabled, VCOM discharge is enabled (62.52-µs deglitch). |+| 13 | N/C | unconnected | Not internally connected. |+| 14 | VCOM_DIS | input | Discharge pin for VCOM; connect to ground to discharge VCOM when disabled, or leave floating if discharge is not wanted. |+| 15 | VCOM | power_out | Filter pin for the panel common-voltage driver; connect a 4.7-µF capacitor from this pin to ground. |+| 16 | VCOM_PWR | power_in | Internal supply input to the VCOM buffer; connect to the DCDC2 output and place a 4.7-µF capacitor from this pin to ground. |+| 17 | SCL | input | Serial interface (I2C) clock input. |+| 18 | SDA | bidirectional | Serial interface (I2C) data input/output. |+| 19 | VPOS_DIS | input | Discharge pin for VPOS; connect a resistor from VPOS_DIS to VPOS to discharge it when the rail is disabled, or leave floating if discharge is not wanted. |+| 20 | N/C | unconnected | Not internally connected. |+| 21 | PWRUP | input | Power-up pin: pull high to power up all output rails (0-ns deglitch). |+| 22 | PBKG | passive | Die substrate; connect to the VN pin (-16 V) with a short, wide trace to improve heat dissipation. |+| 23 | PWR_GOOD | output | Open-drain power-good output, pulled low when one or more rails are disabled or out of regulation; DCDC1, DCDC2 and VCOM have no effect on it. |+| 24 | VIN_P | power_in | Input supply for the inverting buck-boost converter (DCDC2); connect a 10-µF capacitor from this pin to ground. |+| 25 | VN_SW | output | Switch output of the inverting buck-boost converter (DCDC2). |+| 26 | VN | input | Feedback pin for the inverting buck-boost converter (DCDC2) and supply for the VNEG LDO and VEE charge pump; connect a 4.7-µF capacitor from this pin to ground. |+| 27 | VEE_IN | power_in | Input supply pin for the negative charge pump CP2 (VEE). |+| 28 | VEE_DRV | output | Driver output pin for the negative charge pump CP2 (VEE, -20 V rail). |+| 29 | VEE_DIS | input | Discharge pin for VEE; connect a resistor from VEE_DIS to VEE to discharge it when the rail is disabled, or leave floating if discharge is not wanted. |+| 30 | VEE_D | power_out | Base voltage output of the negative charge pump CP2; connect a 100-nF capacitor from this pin to ground. |+| 31 | VEE_FB | input | Feedback pin for the negative charge pump CP2; rated 0 V to 3.6 V in recommended conditions. |+| 32 | PGND2 | power_in | Power ground for the CP1 (VDDH) and CP2 (VEE) charge pumps. |+| 33 | VDDH_FB | input | Feedback pin for the positive charge pump CP1; rated 0 V to 3.6 V in recommended conditions. |+| 34 | VDDH_D | power_out | Base voltage output of the positive charge pump CP1; connect a 100-nF capacitor from this pin to ground. |+| 35 | VDDH_DIS | input | Discharge pin for VDDH; connect to VDDH to discharge it to ground when the rail is disabled, or leave floating if discharge is not wanted. |+| 36 | VDDH_DRV | output | Driver output pin for the positive charge pump CP1 (VDDH, 22-V rail). |+| 37 | VDDH_IN | power_in | Input supply pin for the positive charge pump CP1 (VDDH). |+| 38 | N/C | unconnected | Not internally connected. |+| 39 | N/C | unconnected | Not internally connected. |+| 40 | VB_SW | output | Switch output of the boost converter (DCDC1). |+| 41 | PGND1 | power_in | Power ground for DCDC1. |+| 42 | VB | power_in | Feedback pin for the boost converter (DCDC1) and supply for the VPOS LDO and VDDH charge pump; connect a 4.7-µF capacitor from this pin to ground. |+| 43 | VPOS_IN | power_in | Input pin for LDO1 (VPOS); connect a 4.7-µF capacitor from this pin to ground. |+| 44 | VPOS | power_out | Positive supply output for panel source drivers; connect a 4.7-µF capacitor from this pin to ground. |+| 45 | VIN3P3 | power_in | Input pin to the 3.3-V power switch (3 V to 6 V recommended input range). |+| 46 | V3P3 | power_out | Output pin of the 3.3-V power switch. |+| 47 | TS | input | Thermistor input; connect a 10-kΩ NTC thermistor and a 43-kΩ linearization resistor between this pin and AGND. |+| 48 | AGND2 | power_in | Reference point for the external thermistor and linearization resistor. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-48-EP(7x7) |+| Category | Power Management (PMIC) |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `TPS65185RGZR`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `tps65185rgzr-etched.step` / `tps65185rgzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps65185rgzr.step` / `tps65185rgzr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps65185) (66 pp, sha256 `903effae4b79ef29`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps65185rgzr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps65185rgzr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps65185rgzr.kicad_sym",+ "tps65185rgzr.kicad_mod",+ "tps65185rgzr.glb",+ "tps65185rgzr.step",+ "tps65185rgzr.lbr",+ "docs/hero.png",+ "docs/tps65185rgzr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps65185rgzr-hero.glb",+ "tps65185rgzr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS65185RGZR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-48-EP(7x7)",+ "pin_count": 49,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Management - Specialized",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps65185",+ "parts": {+ "symbol": "tps65185rgzr.kicad_sym",+ "footprint": "tps65185rgzr.kicad_mod",+ "model_3d": "tps65185rgzr-hero.glb",+ "model_3d_plain": "tps65185rgzr.glb",+ "model_3d_step": "tps65185rgzr-etched.step",+ "model_3d_step_plain": "tps65185rgzr.step",+ "lbr": "tps65185rgzr.lbr"+ },+ "distributor_links": {+ "lcsc": "C139291",+ "digikey": "296-28832-2-ND",+ "mouser": "595-TPS65185RGZR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:59:22Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-28832-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS65185RGZR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VREF",+ "type": "power_out",+ "description": "Filter pin for the 2.25-V internal ADC reference; connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "2",+ "name": "INT",+ "type": "output",+ "description": "Open-drain interrupt output, active low."+ },+ {+ "number": "3",+ "name": "VNEG",+ "type": "power_out",+ "description": "Negative supply output for panel source drivers; connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "4",+ "name": "VNEG_IN",+ "type": "power_in",+ "description": "Input pin for LDO2 (VNEG); connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "5",+ "name": "WAKEUP",+ "type": "input",+ "description": "Active-high wake-up pin to exit sleep mode; I2C accepts commands once high, but power rails stay disabled until PWRUP is high (93.75-µs deglitch)."+ },+ {+ "number": "6",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground; connect to the ground plane."+ },+ {+ "number": "7",+ "name": "INT_LDO",+ "type": "power_out",+ "description": "Filter pin for the 2.7-V internal supply; connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "8",+ "name": "AGND1",+ "type": "power_in",+ "description": "Analog ground for general analog circuitry."+ },+ {+ "number": "9",+ "name": "VNEG_DIS",+ "type": "output",+ "description": "Discharge pin for VNEG; connect to VNEG to discharge it to ground when the rail is disabled, or leave floating if discharge is not wanted."+ },+ {+ "number": "10",+ "name": "VIN",+ "type": "power_in",+ "description": "Input power supply for general circuitry (3 V to 6 V recommended input range); connect a 10-µF capacitor from this pin to ground."+ },+ {+ "number": "11",+ "name": "N/C",+ "type": "unconnected",+ "description": "Not internally connected."+ },+ {+ "number": "12",+ "name": "VCOM_CTRL",+ "type": "input",+ "description": "VCOM enable: pull high to enable the VCOM amplifier; when pulled low with VN enabled, VCOM discharge is enabled (62.52-µs deglitch)."+ },+ {+ "number": "13",+ "name": "N/C",+ "type": "unconnected",+ "description": "Not internally connected."+ },+ {+ "number": "14",+ "name": "VCOM_DIS",+ "type": "input",+ "description": "Discharge pin for VCOM; connect to ground to discharge VCOM when disabled, or leave floating if discharge is not wanted."+ },+ {+ "number": "15",+ "name": "VCOM",+ "type": "power_out",+ "description": "Filter pin for the panel common-voltage driver; connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "16",+ "name": "VCOM_PWR",+ "type": "power_in",+ "description": "Internal supply input to the VCOM buffer; connect to the DCDC2 output and place a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "17",+ "name": "SCL",+ "type": "input",+ "description": "Serial interface (I2C) clock input."+ },+ {+ "number": "18",+ "name": "SDA",+ "type": "bidirectional",+ "description": "Serial interface (I2C) data input/output."+ },+ {+ "number": "19",+ "name": "VPOS_DIS",+ "type": "input",+ "description": "Discharge pin for VPOS; connect a resistor from VPOS_DIS to VPOS to discharge it when the rail is disabled, or leave floating if discharge is not wanted."+ },+ {+ "number": "20",+ "name": "N/C",+ "type": "unconnected",+ "description": "Not internally connected."+ },+ {+ "number": "21",+ "name": "PWRUP",+ "type": "input",+ "description": "Power-up pin: pull high to power up all output rails (0-ns deglitch)."+ },+ {+ "number": "22",+ "name": "PBKG",+ "type": "passive",+ "description": "Die substrate; connect to the VN pin (-16 V) with a short, wide trace to improve heat dissipation."+ },+ {+ "number": "23",+ "name": "PWR_GOOD",+ "type": "output",+ "description": "Open-drain power-good output, pulled low when one or more rails are disabled or out of regulation; DCDC1, DCDC2 and VCOM have no effect on it."+ },+ {+ "number": "24",+ "name": "VIN_P",+ "type": "power_in",+ "description": "Input supply for the inverting buck-boost converter (DCDC2); connect a 10-µF capacitor from this pin to ground."+ },+ {+ "number": "25",+ "name": "VN_SW",+ "type": "output",+ "description": "Switch output of the inverting buck-boost converter (DCDC2)."+ },+ {+ "number": "26",+ "name": "VN",+ "type": "input",+ "description": "Feedback pin for the inverting buck-boost converter (DCDC2) and supply for the VNEG LDO and VEE charge pump; connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "27",+ "name": "VEE_IN",+ "type": "power_in",+ "description": "Input supply pin for the negative charge pump CP2 (VEE)."+ },+ {+ "number": "28",+ "name": "VEE_DRV",+ "type": "output",+ "description": "Driver output pin for the negative charge pump CP2 (VEE, -20 V rail)."+ },+ {+ "number": "29",+ "name": "VEE_DIS",+ "type": "input",+ "description": "Discharge pin for VEE; connect a resistor from VEE_DIS to VEE to discharge it when the rail is disabled, or leave floating if discharge is not wanted."+ },+ {+ "number": "30",+ "name": "VEE_D",+ "type": "power_out",+ "description": "Base voltage output of the negative charge pump CP2; connect a 100-nF capacitor from this pin to ground."+ },+ {+ "number": "31",+ "name": "VEE_FB",+ "type": "input",+ "description": "Feedback pin for the negative charge pump CP2; rated 0 V to 3.6 V in recommended conditions."+ },+ {+ "number": "32",+ "name": "PGND2",+ "type": "power_in",+ "description": "Power ground for the CP1 (VDDH) and CP2 (VEE) charge pumps."+ },+ {+ "number": "33",+ "name": "VDDH_FB",+ "type": "input",+ "description": "Feedback pin for the positive charge pump CP1; rated 0 V to 3.6 V in recommended conditions."+ },+ {+ "number": "34",+ "name": "VDDH_D",+ "type": "power_out",+ "description": "Base voltage output of the positive charge pump CP1; connect a 100-nF capacitor from this pin to ground."+ },+ {+ "number": "35",+ "name": "VDDH_DIS",+ "type": "input",+ "description": "Discharge pin for VDDH; connect to VDDH to discharge it to ground when the rail is disabled, or leave floating if discharge is not wanted."+ },+ {+ "number": "36",+ "name": "VDDH_DRV",+ "type": "output",+ "description": "Driver output pin for the positive charge pump CP1 (VDDH, 22-V rail)."+ },+ {+ "number": "37",+ "name": "VDDH_IN",+ "type": "power_in",+ "description": "Input supply pin for the positive charge pump CP1 (VDDH)."+ },+ {+ "number": "38",+ "name": "N/C",+ "type": "unconnected",+ "description": "Not internally connected."+ },+ {+ "number": "39",+ "name": "N/C",+ "type": "unconnected",+ "description": "Not internally connected."+ },+ {+ "number": "40",+ "name": "VB_SW",+ "type": "output",+ "description": "Switch output of the boost converter (DCDC1)."+ },+ {+ "number": "41",+ "name": "PGND1",+ "type": "power_in",+ "description": "Power ground for DCDC1."+ },+ {+ "number": "42",+ "name": "VB",+ "type": "power_in",+ "description": "Feedback pin for the boost converter (DCDC1) and supply for the VPOS LDO and VDDH charge pump; connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "43",+ "name": "VPOS_IN",+ "type": "power_in",+ "description": "Input pin for LDO1 (VPOS); connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "44",+ "name": "VPOS",+ "type": "power_out",+ "description": "Positive supply output for panel source drivers; connect a 4.7-µF capacitor from this pin to ground."+ },+ {+ "number": "45",+ "name": "VIN3P3",+ "type": "power_in",+ "description": "Input pin to the 3.3-V power switch (3 V to 6 V recommended input range)."+ },+ {+ "number": "46",+ "name": "V3P3",+ "type": "power_out",+ "description": "Output pin of the 3.3-V power switch."+ },+ {+ "number": "47",+ "name": "TS",+ "type": "input",+ "description": "Thermistor input; connect a 10-kΩ NTC thermistor and a 43-kΩ linearization resistor between this pin and AGND."+ },+ {+ "number": "48",+ "name": "AGND2",+ "type": "power_in",+ "description": "Reference point for the external thermistor and linearization resistor."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet pin-function table does not state an electrical type for PBKG (pin 22); it is listed o; The thermal pad is an exposed pad with no printed pin number, so it is not listed as a numbered pin.; The pin drawing and pin-function table cover both the RGZ (7x7) and RSL (6x6) packages with identica",+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 12,+ "cost_usd": 0.1146,+ "at": "2026-10-08T18:59:02"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps65185",+ "pages": 66,+ "sha256": "903effae4b79ef29",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps65185rgzr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f2b38b0b4bf967c77e683e8d4599608b9f0503055ec535b93c4ebb5d0163e916",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps65185rgzr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7,+ 7,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3b1d9bc21a05ae4a5e0a52071bc1098d79d84e92cf9210178056699b56d8e6ac",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}