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TPS62134DRGTR
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Texas Instruments DC-DC Converters, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# TPS62134DRGTR++**Texas Instruments** · DC-DC Converters · VQFN-16-EP(3x3)++TPS62134DRGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOS | input | Output voltage sense pin for the control loop circuitry, which must be connected directly at the output capacitor. |+| 2 | SW | power_out | Switch node connected to the internal MOSFET switches; connect the inductor between this pin and the output capacitor. |+| 3 | SW | power_out | Switch node connected to the internal MOSFET switches; connect the inductor between this pin and the output capacitor. |+| 4 | PG | output | Open-drain power-good output that requires a pullup resistor (V(PG) 0 to 6 V, sink current max 2 mA); leave floating if not used. |+| 5 | FBS | input | Output-voltage feedback pin used for positive remote sense of the load voltage; must be connected close to the load-supply node on the output bus. |+| 6 | AGND | power_in | Analog ground that must be connected directly to the exposed thermal pad and common ground plane. |+| 7 | SS | output | Soft-start pin; an external capacitor connected to this pin sets the soft-start time. |+| 8 | VID1 | input | Output-voltage selection pin (VIDx) for selecting the fixed output voltage and dynamic output-voltage change. |+| 9 | VID0 | input | Output-voltage selection pin (VIDx) for selecting the fixed output voltage and dynamic output-voltage change. |+| 10 | AVIN | input | Supply-voltage pin for the internal control circuitry; connect to the same source as PVIN, with an input range of 3 V to 17 V. |+| 11 | PVIN | power_in | Supply-voltage pin for the internal power stage, with an input range of 3 V to 17 V. |+| 12 | PVIN | power_in | Supply-voltage pin for the internal power stage, with an input range of 3 V to 17 V. |+| 13 | EN | input | Enable and disable input with an internal pulldown that holds the logic level low if the pin is floating. |+| 14 | LPM | input | Low-power-mode input pin that reduces the output voltage when used to enter low-power mode. |+| 15 | PGND | power_in | Power ground that must be connected directly to the exposed thermal pad and common ground plane. |+| 16 | PGND | power_in | Power ground that must be connected directly to the exposed thermal pad and common ground plane. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-16-EP(3x3) |+| Category | Power Supply Chip |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `TPS62134DRGTR`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `tps62134drgtr-etched.step` / `tps62134drgtr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps62134drgtr.step` / `tps62134drgtr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps62134d.pdf) (31 pp, sha256 `025c93b0451bd3e1`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps62134drgtr-datasheet.pdf)
page.jsonadded+255@@ -0,0 +1,255 @@+{+ "slug": "tps62134drgtr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, VQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "tps62134drgtr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps62134drgtr.kicad_sym",+ "tps62134drgtr.kicad_mod",+ "tps62134drgtr.glb",+ "tps62134drgtr.step",+ "tps62134drgtr.lbr",+ "docs/hero.png",+ "docs/tps62134drgtr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps62134drgtr-hero.glb",+ "tps62134drgtr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS62134DRGTR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-16-EP(3x3)",+ "pin_count": 17,+ "category": "Power Supply Chip",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/lit/ds/symlink/tps62134d.pdf",+ "parts": {+ "symbol": "tps62134drgtr.kicad_sym",+ "footprint": "tps62134drgtr.kicad_mod",+ "model_3d": "tps62134drgtr-hero.glb",+ "model_3d_plain": "tps62134drgtr.glb",+ "model_3d_step": "tps62134drgtr-etched.step",+ "model_3d_step_plain": "tps62134drgtr.step",+ "lbr": "tps62134drgtr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2071169",+ "digikey": "296-40836-2-ND",+ "mouser": "595-TPS62134DRGTR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T15:29:39Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-40836-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS62134DRGTR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VOS",+ "type": "input",+ "description": "Output voltage sense pin for the control loop circuitry, which must be connected directly at the output capacitor."+ },+ {+ "number": "2",+ "name": "SW",+ "type": "power_out",+ "description": "Switch node connected to the internal MOSFET switches; connect the inductor between this pin and the output capacitor."+ },+ {+ "number": "3",+ "name": "SW",+ "type": "power_out",+ "description": "Switch node connected to the internal MOSFET switches; connect the inductor between this pin and the output capacitor."+ },+ {+ "number": "4",+ "name": "PG",+ "type": "output",+ "description": "Open-drain power-good output that requires a pullup resistor (V(PG) 0 to 6 V, sink current max 2 mA); leave floating if not used."+ },+ {+ "number": "5",+ "name": "FBS",+ "type": "input",+ "description": "Output-voltage feedback pin used for positive remote sense of the load voltage; must be connected close to the load-supply node on the output bus."+ },+ {+ "number": "6",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground that must be connected directly to the exposed thermal pad and common ground plane."+ },+ {+ "number": "7",+ "name": "SS",+ "type": "output",+ "description": "Soft-start pin; an external capacitor connected to this pin sets the soft-start time."+ },+ {+ "number": "8",+ "name": "VID1",+ "type": "input",+ "description": "Output-voltage selection pin (VIDx) for selecting the fixed output voltage and dynamic output-voltage change."+ },+ {+ "number": "9",+ "name": "VID0",+ "type": "input",+ "description": "Output-voltage selection pin (VIDx) for selecting the fixed output voltage and dynamic output-voltage change."+ },+ {+ "number": "10",+ "name": "AVIN",+ "type": "input",+ "description": "Supply-voltage pin for the internal control circuitry; connect to the same source as PVIN, with an input range of 3 V to 17 V."+ },+ {+ "number": "11",+ "name": "PVIN",+ "type": "power_in",+ "description": "Supply-voltage pin for the internal power stage, with an input range of 3 V to 17 V."+ },+ {+ "number": "12",+ "name": "PVIN",+ "type": "power_in",+ "description": "Supply-voltage pin for the internal power stage, with an input range of 3 V to 17 V."+ },+ {+ "number": "13",+ "name": "EN",+ "type": "input",+ "description": "Enable and disable input with an internal pulldown that holds the logic level low if the pin is floating."+ },+ {+ "number": "14",+ "name": "LPM",+ "type": "input",+ "description": "Low-power-mode input pin that reduces the output voltage when used to enter low-power mode."+ },+ {+ "number": "15",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground that must be connected directly to the exposed thermal pad and common ground plane."+ },+ {+ "number": "16",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground that must be connected directly to the exposed thermal pad and common ground plane."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad is not given a printed pin number in the datasheet pin table, so it is omitt; The Pin Functions table lists pin 7 (SS) with type O, which is kept as output as printed. The SS pin; The revision history says pin names 8 and 9 were switched in revision B. The current Pin Functions t",+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 8,+ "cost_usd": 0.0689,+ "at": "2026-10-08T15:29:13"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/tps62134d.pdf",+ "pages": 31,+ "sha256": "025c93b0451bd3e1",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps62134drgtr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3eb81ffac423a66cdcfead8efe56401da171edaf1f2257049aad7b2d3900f6c8",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps62134drgtr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3,+ 3,+ 0.785+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "97f8e606980a2a3039b34d099f501315b0335657f361acdc00adc0552f654a10",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}