TPS62042DGQR

@@ -0,0 +1,54 @@+# TPS62042DGQR++**Texas Instruments** · DC-DC Converters · MSOP-10-EP++TPS62042DGQR from Texas Instruments, in a MSOP-10-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EN | input | Enable input. Pulling EN to GND forces the device into shutdown (I_SD ≈ 0.1 µA). Pulling EN to V_IN enables the converter. V_IH ≥ 1.4 V, V_IL ≤ 0.4 V, I_EN ≈ 0.01 µA. Must not be left floating. |+| 2 | VIN | power_in | Supply voltage input, 2.5 V to 6.0 V (absolute max 7 V). Tie pins 2 and 3 together and bypass with a 22 µF ceramic input capacitor close to the pin. |+| 3 | VIN | power_in | Supply voltage input, 2.5 V to 6.0 V. Second VIN pin; connect to pin 2 externally on the PCB. |+| 4 | GND | power_in | Analog ground. Reference for the internal control circuitry; keep separate quiet return trace from PGND but tie together at the PowerPAD/star ground. |+| 5 | FB | input | Feedback input to the error amplifier. On the fixed-output TPS62042 (1.5 V) tie FB directly to the regulated output; on the adjustable TPS62040 an external divider from V_OUT to GND sets V_OUT (V_ref = 0.5 V). The internal divider is disabled for adjustable variants. |+| 6 | MODE | input | Operating-mode select. MODE high forces fixed-frequency PWM operation (lower output ripple / noise). MODE low enables power-save mode: fixed-frequency PWM at heavy load, automatic PFM at light loads for higher efficiency. V_IH ≥ 1.4 V, V_IL ≤ 0.4 V, I_MODE ≈ 0.01 µA. |+| 7 | SW | output | Switch node - drain of the internal P-channel and N-channel power MOSFETs. Connect to the external 6.2 µH inductor. Tie pins 7 and 8 together externally. Current limit ≈ 1.85 A (typ). |+| 8 | SW | output | Switch node (second pin); connect externally to pin 7 and to the inductor. |+| 9 | PGND | power_in | Power ground - return for the internal N-channel synchronous rectifier. Tie pins 9 and 10 together and route directly to the output capacitor return and the PowerPAD. |+| 10 | PGND | power_in | Power ground (second pin); connect externally to pin 9. |+| 11 | PAD | power_in | Exposed thermal PowerPAD on the underside of the DGQ MSOP-10 package. Must be soldered to the PCB GND plane through thermal vias for the rated θ_JA = 60 °C/W. Note explicitly states 'The PowerPAD must be connected to GND.' |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | MSOP-10-EP |+| Category | Power Management (PMIC) |+| Pins | 11 |++## Ordering variants++Same part, different packaging or reel option.++- `TPS62042DGQR`+- `TPS62042DGQRDRC`+- `TPS62042DGQRDRCR`++## CAD (KiCad official)++- Symbol: `TPS62042DGQR`+- Footprint: `Package_SO:MSOP-10-1EP_3x3mm_P0.5mm_EP1.68x1.88mm`+- 3D model: MSOP-10-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](http://www.ti.com/cn/lit/gpn/tps62046) (None pp, sha256 `573d1e788be29d1d`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps62042dgqr-datasheet.pdf)

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