TPS61175QPWPRQ1

@@ -1,13 +1,174 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "tps61175qpwprq1",+  "title": "TPS61175QPWPRQ1",+  "brief": "Texas Instruments DC-DC Converters, HTSSOP-14-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments DC-DC Converters, HTSSOP-14-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "power management (pmic)",     "tps61175qpwprq1"   ],+  "component": {+    "mpn": "TPS61175QPWPRQ1",+    "manufacturer": "Texas Instruments",+    "package": "HTSSOP-14-EP",+    "pin_count": 15,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps61175-q1",+    "parts": {+      "symbol": "tps61175qpwprq1.kicad_sym",+      "footprint": "tps61175qpwprq1.kicad_mod",+      "model_3d": "tps61175qpwprq1.glb",+      "model_3d_step": "tps61175qpwprq1.step",+      "lbr": "tps61175qpwprq1.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "SW",+        "type": "power_out",+        "description": "Switching node of the internal 40 V / 3 A power MOSFET drain. Pins 1 and 2 are tied together internally and must be connected to the switched side of the inductor / rectifier diode. Route with wide, short traces to minimize EMI and switching losses."+      },+      {+        "number": "2",+        "name": "SW",+        "type": "power_out",+        "description": "Switching node of the internal 40 V / 3 A power MOSFET drain. Pins 1 and 2 are tied together internally and must be connected to the switched side of the inductor / rectifier diode. Route with wide, short traces to minimize EMI and switching losses."+      },+      {+        "number": "3",+        "name": "VIN",+        "type": "power_in",+        "description": "Input supply pin for the IC control circuitry. Accepts 2.9 V to 18 V; may be biased from a source different than the boost power stage input if the application requires operation above the 18 V VIN range. Bypass with a low-ESR ceramic capacitor (\u22654.7 \u03bcF) to PGND close to the pin."+      },+      {+        "number": "4",+        "name": "EN",+        "type": "input",+        "description": "Enable input. Logic-high (V_ENIH \u2265 1.2 V) enables the converter; when the pin falls below the enable-low threshold (V_ENIL \u2264 0.4 V) for more than 10 ms, the IC turns off. Contains an internal ~800 k\u03a9 pull-down resistor to GND. Absolute-max rating is 20 V."+      },+      {+        "number": "5",+        "name": "SS",+        "type": "passive",+        "description": "Soft-start programming pin. A capacitor from SS to GND sets the output voltage ramp-up time and limits inrush current at startup. Refer to the datasheet application section for capacitor sizing (max pin voltage 7 V)."+      },+      {+        "number": "6",+        "name": "SYNC",+        "type": "input",+        "description": "Switching frequency synchronization input. Accepts an external clock (V_SYN \u2264 5 V, high \u2265 1.2 V, low \u2264 0.4 V) between 200 kHz and 2.2 MHz to lock the internal oscillator. If unused, tie directly to AGND with the shortest possible trace to avoid noise coupling."+      },+      {+        "number": "7",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog/signal ground return for the internal control circuitry. Must be tied to the system ground plane; connect the thermal pad to this net at a single quiet ground reference point separated from the high-current PGND path."+      },+      {+        "number": "8",+        "name": "COMP",+        "type": "output",+        "description": "Output of the internal transconductance (gm \u2248 340 \u03bcmho) error amplifier. Connect an external RC compensation network from COMP to AGND to shape the control loop response. Internal clamp voltages are 3 V (high) and 0.75 V (low)."+      },+      {+        "number": "9",+        "name": "FB",+        "type": "input",+        "description": "Feedback input for output voltage regulation. Connect the midpoint of an external resistor divider from V_OUT to FB; the internal reference regulates this pin to V_REF = 1.229 V (typ). Input bias current is 200 nA (max)."+      },+      {+        "number": "10",+        "name": "FREQ",+        "type": "passive",+        "description": "Switching frequency programming pin. An external resistor from FREQ to AGND sets the internal oscillator frequency (e.g. 480 k\u03a9 \u2248 210 kHz, 80 k\u03a9 \u2248 1.2 MHz, 40 k\u03a9 \u2248 2.2 MHz). Pin sits at ~1.229 V."+      },+      {+        "number": "11",+        "name": "NC",+        "type": "passive",+        "description": "Reserved pin. The datasheet requires this pin be connected to ground for proper operation; do not leave floating and do not connect to any external signal."+      },+      {+        "number": "12",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground return connected to the source of the internal PWM power MOSFET. Pins 12, 13, and 14 are internally tied and must be connected to a low-impedance ground plane with short, wide traces to handle the switch current."+      },+      {+        "number": "13",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground return connected to the source of the internal PWM power MOSFET. Pins 12, 13, and 14 are internally tied and must be connected to a low-impedance ground plane with short, wide traces to handle the switch current."+      },+      {+        "number": "14",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground return connected to the source of the internal PWM power MOSFET. Pins 12, 13, and 14 are internally tied and must be connected to a low-impedance ground plane with short, wide traces to handle the switch current."+      },+      {+        "number": "15",+        "name": "PAD",+        "type": "power_in",+        "description": "Exposed PowerPAD on the underside of the HTSSOP package. Must be soldered to the analog ground copper for electrical connection and thermal dissipation; use multiple thermal vias to internal and bottom ground planes for optimum \u03b8_JA (45.2 \u00b0C/W)."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps61175-q1",+        "pages": 30,+        "sha256": "55bee4dd568920d3",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 15,+        "described": 15,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "HTSSOP-14-EP",+      "Category": "Power Management (PMIC)",+      "Pins": "15"+    }+  },+  "variants": [+    {+      "mpn": "TPS61175QPWPRQ1",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "tps61175qpwprq1"+  ],+  "discovery_pitch": "TPS61175QPWPRQ1 (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +186,5 @@     "docs/tps61175qpwprq1-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file