component
TPS60110PWPR
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Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+57@@ -0,0 +1,57 @@+# TPS60110PWPR++**Texas Instruments** · DC-DC Converters · HTSSOP-20-EP++TPS60110PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GND | power_in | Analog ground for internal reference and control circuitry; connect to PGND through a short trace. |+| 2 | SYNC | input | External clock synchronization selection; connect to GND for internal clock or to IN for external synchronization. |+| 3 | ENABLE | input | Enable logic input that turns off device and reduces supply current to 0.05 µA maximum when low; must be high only when VIN is in recommended range. |+| 4 | FB | input | Feedback input connected to internal 1.22 V bandgap reference through on-chip resistive divider for voltage regulation. |+| 5 | OUT | output | Regulated 5 V ±4% power output with 300 mA maximum current from 2.7 V to 5.4 V input; connect both OUT pins together and bypass to GND with output filter capacitor. |+| 6 | C1+ | passive | Positive terminal of charge-pump transfer capacitor C1F. |+| 7 | IN | power_in | Supply input in 2.7 V to 5.4 V range; bypass to GND with (CO/2) µF capacitor and connect both IN pins through short trace. |+| 8 | C1− | passive | Negative terminal of charge-pump transfer capacitor C1F. |+| 9 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |+| 10 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |+| 11 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |+| 12 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |+| 13 | C2− | passive | Negative terminal of charge-pump transfer capacitor C2F. |+| 14 | IN | power_in | Supply input in 2.7 V to 5.4 V range; bypass to GND with (CO/2) µF capacitor and connect both IN pins through short trace. |+| 15 | C2+ | passive | Positive terminal of charge-pump transfer capacitor C2F. |+| 16 | OUT | output | Regulated 5 V ±4% power output with 300 mA maximum current from 2.7 V to 5.4 V input; connect both OUT pins together and bypass to GND with output filter capacitor. |+| 17 | SKIP | input | Mode selection input; logic low for constant-frequency mode with minimized output ripple, high or connected to IN for pulse-skip mode. |+| 18 | COM | input | Mode selection input; logic low for push-pull mode with minimized ripple, high or connected to IN for single-ended mode requiring only one flying capacitor. |+| 19 | CLK | input | External clock signal input; connect to GND if internal clock is used, or drive with 400-800 kHz external clock when SYNC connected to IN. |+| 20 | GND | power_in | Analog ground for internal reference and control circuitry; connect to PGND through a short trace. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | Power Management (PMIC) |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `TPS60110PWPR`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `tps60110pwpr-etched.step` / `tps60110pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps60110pwpr.step` / `tps60110pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps60110) (28 pp, sha256 `f7e42aa999eb63ef`, retrieved 2026-10-05, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps60110pwpr-datasheet.pdf)
page.jsonadded+238@@ -0,0 +1,238 @@+{+ "slug": "tps60110pwpr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps60110pwpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps60110pwpr.kicad_sym",+ "tps60110pwpr.kicad_mod",+ "tps60110pwpr.glb",+ "tps60110pwpr.step",+ "tps60110pwpr.lbr",+ "docs/hero.png",+ "docs/tps60110pwpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps60110pwpr-hero.glb",+ "tps60110pwpr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS60110PWPR",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-20-EP",+ "pin_count": 21,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps60110",+ "parts": {+ "symbol": "tps60110pwpr.kicad_sym",+ "footprint": "tps60110pwpr.kicad_mod",+ "model_3d": "tps60110pwpr-hero.glb",+ "model_3d_plain": "tps60110pwpr.glb",+ "model_3d_step": "tps60110pwpr-etched.step",+ "model_3d_step_plain": "tps60110pwpr.step",+ "lbr": "tps60110pwpr.lbr"+ },+ "distributor_links": {+ "lcsc": 7096,+ "digikey": "296-31986-2-ND",+ "mouser": "595-TPS60110PWPR"+ },+ "distributor_check": {+ "checked_at": "2026-10-05T23:25:52Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-31986-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TPS60110PWPR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Analog ground for internal reference and control circuitry; connect to PGND through a short trace."+ },+ {+ "number": "2",+ "name": "SYNC",+ "type": "input",+ "description": "External clock synchronization selection; connect to GND for internal clock or to IN for external synchronization."+ },+ {+ "number": "3",+ "name": "ENABLE",+ "type": "input",+ "description": "Enable logic input that turns off device and reduces supply current to 0.05 µA maximum when low; must be high only when VIN is in recommended range."+ },+ {+ "number": "4",+ "name": "FB",+ "type": "input",+ "description": "Feedback input connected to internal 1.22 V bandgap reference through on-chip resistive divider for voltage regulation."+ },+ {+ "number": "5",+ "name": "OUT",+ "type": "output",+ "description": "Regulated 5 V ±4% power output with 300 mA maximum current from 2.7 V to 5.4 V input; connect both OUT pins together and bypass to GND with output filter capacitor."+ },+ {+ "number": "6",+ "name": "C1+",+ "type": "passive",+ "description": "Positive terminal of charge-pump transfer capacitor C1F."+ },+ {+ "number": "7",+ "name": "IN",+ "type": "power_in",+ "description": "Supply input in 2.7 V to 5.4 V range; bypass to GND with (CO/2) µF capacitor and connect both IN pins through short trace."+ },+ {+ "number": "8",+ "name": "C1−",+ "type": "passive",+ "description": "Negative terminal of charge-pump transfer capacitor C1F."+ },+ {+ "number": "9",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground through which charge-pump current flows; connect all PGND pins (9-12) together."+ },+ {+ "number": "10",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground through which charge-pump current flows; connect all PGND pins (9-12) together."+ },+ {+ "number": "11",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground through which charge-pump current flows; connect all PGND pins (9-12) together."+ },+ {+ "number": "12",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground through which charge-pump current flows; connect all PGND pins (9-12) together."+ },+ {+ "number": "13",+ "name": "C2−",+ "type": "passive",+ "description": "Negative terminal of charge-pump transfer capacitor C2F."+ },+ {+ "number": "14",+ "name": "IN",+ "type": "power_in",+ "description": "Supply input in 2.7 V to 5.4 V range; bypass to GND with (CO/2) µF capacitor and connect both IN pins through short trace."+ },+ {+ "number": "15",+ "name": "C2+",+ "type": "passive",+ "description": "Positive terminal of charge-pump transfer capacitor C2F."+ },+ {+ "number": "16",+ "name": "OUT",+ "type": "output",+ "description": "Regulated 5 V ±4% power output with 300 mA maximum current from 2.7 V to 5.4 V input; connect both OUT pins together and bypass to GND with output filter capacitor."+ },+ {+ "number": "17",+ "name": "SKIP",+ "type": "input",+ "description": "Mode selection input; logic low for constant-frequency mode with minimized output ripple, high or connected to IN for pulse-skip mode."+ },+ {+ "number": "18",+ "name": "COM",+ "type": "input",+ "description": "Mode selection input; logic low for push-pull mode with minimized ripple, high or connected to IN for single-ended mode requiring only one flying capacitor."+ },+ {+ "number": "19",+ "name": "CLK",+ "type": "input",+ "description": "External clock signal input; connect to GND if internal clock is used, or drive with 400-800 kHz external clock when SYNC connected to IN."+ },+ {+ "number": "20",+ "name": "GND",+ "type": "power_in",+ "description": "Analog ground for internal reference and control circuitry; connect to PGND through a short trace."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 21 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 28,+ "cost_usd": 0.1916,+ "at": "2026-10-05T23:25:29"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps60110",+ "pages": 28,+ "sha256": "f7e42aa999eb63ef",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}