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Set visibility: public

Ray ·18027fc526 ·1mo ago ·parent 680252c
1 file changed +8−5
page.json+8−5
@@ -38,7 +38,7 @@         "number": "2",         "name": "SW",         "type": "output",-        "description": "Switch node connection between the internal high-side NFET and low-side NFET. Connect to the output inductor. Absolute-max range \u22122 V to 19 V; SW voltage referenced during 10-ns transient extends \u22123.5 V to 21 V."+        "description": "Switch node connection between the internal high-side NFET and low-side NFET. Connect to the output inductor. Absolute-max range −2 V to 19 V; SW voltage referenced during 10-ns transient extends −3.5 V to 21 V."       },       {         "number": "3",@@ -50,19 +50,19 @@         "number": "4",         "name": "VFB",         "type": "input",-        "description": "Converter feedback input. Connect to the output voltage through a feedback resistor divider. Internal reference V_FBTH \u2248 768 mV (CCM); input current \u2264 \u00b10.1 \u00b5A."+        "description": "Converter feedback input. Connect to the output voltage through a feedback resistor divider. Internal reference V_FBTH ≈ 768 mV (CCM); input current ≤ ±0.1 µA."       },       {         "number": "5",         "name": "EN",         "type": "input",-        "description": "Enable input control. Active high; must be pulled up to enable the device. V_ENH \u2265 1.6 V (on), V_ENL \u2264 0.8 V (off). Internal pull-down resistance to GND \u2248 400 k\u03a9 (225-900 k\u03a9)."+        "description": "Enable input control. Active high; must be pulled up to enable the device. V_ENH ≥ 1.6 V (on), V_ENL ≤ 0.8 V (off). Internal pull-down resistance to GND ≈ 400 kΩ (225-900 kΩ)."       },       {         "number": "6",         "name": "VBST",         "type": "power_out",-        "description": "Bootstrap supply input for the high-side NFET gate-drive circuit. Connect a 0.1-\u00b5F ceramic capacitor between VBST and SW. Absolute-max VBST (vs SW) 6.5 V."+        "description": "Bootstrap supply input for the high-side NFET gate-drive circuit. Connect a 0.1-µF ceramic capacitor between VBST and SW. Absolute-max VBST (vs SW) 6.5 V."       }     ],     "provenance": {@@ -126,5 +126,8 @@     "docs/tps563208ddcr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file