component
TPS563201DDCR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOT-23-THIN-6. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
footprint: the part is a 6-lead SOT-23 (datasheet: 6 pads at 0.95mm pitch, and the symbol has 6 pins) sitting on a 3-pad SOT-23 footprint. Chosen from this part's OWN datasheet, not inferred from a sibling - the Richtek SOP-8-EP parts alone carry three different exposed-pad sizes, so family inference would have been wrong. Rebuilds the .lbr, re-derives pin 1 and pads.json.
4 files changed
+457−383
pads.json+107−33@@ -1,23 +1,23 @@ { "schema": "adom.pads/1", "slug": "tps563201ddcr",- "footprint": "SOT-23",+ "footprint": "SOT-23-6", "generated_from": {- "footprint": "SOT-23@sha256:0d88c86c1b6d8c1a",+ "footprint": "SOT-23-6@sha256:f341c73aac9dcb55", "pins": "page.json:component.pins", "overrides": null }, "pin1": { "pad": "1", "at": [- -0.9375,+ -1.1375, -0.95 ], "corner": "top-left", "source": "silk-marker",- "derived_from": "SOT-23@sha256:0d88c86c1b6d8c1a"+ "derived_from": "SOT-23-6@sha256:f341c73aac9dcb55" },- "pad_count": 3,+ "pad_count": 6, "symbol_pins": [ "1", "2",@@ -27,35 +27,19 @@ "6" ], "paste_apertures": 0,- "issues": [- {- "kind": "pin-has-no-pad",- "pin": "4",- "detail": "the symbol declares pin \"4\" but the footprint has no such pad"- },- {- "kind": "pin-has-no-pad",- "pin": "5",- "detail": "the symbol declares pin \"5\" but the footprint has no such pad"- },- {- "kind": "pin-has-no-pad",- "pin": "6",- "detail": "the symbol declares pin \"6\" but the footprint has no such pad"- }- ],+ "issues": [], "pads": [ { "pad": "1", "kind": "smd", "shape": "roundrect", "at": [- -0.9375,+ -1.1375, -0.95 ], "rot": 0.0, "size": [- 1.475,+ 1.325, 0.6 ], "layers": [@@ -70,7 +54,7 @@ "description": "Ground pin. Source terminal of the low-side power NFET and ground return for the controller circuit. Sensitive VFB return should tie to this GND at a single point.", "is_pin1": true, "source": {- "geometry": "SOT-23.kicad_mod",+ "geometry": "SOT-23-6.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -80,12 +64,12 @@ "kind": "smd", "shape": "roundrect", "at": [- -0.9375,- 0.95+ -1.1375,+ 0.0 ], "rot": 0.0, "size": [- 1.475,+ 1.325, 0.6 ], "layers": [@@ -100,7 +84,7 @@ "description": "Switch node connection between the high-side NFET and the low-side NFET. Connects to the output inductor. Absolute max −2 V to 19 V.", "is_pin1": false, "source": {- "geometry": "SOT-23.kicad_mod",+ "geometry": "SOT-23-6.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }@@ -110,12 +94,12 @@ "kind": "smd", "shape": "roundrect", "at": [- 0.9375,- 0.0+ -1.1375,+ 0.95 ], "rot": 0.0, "size": [- 1.475,+ 1.325, 0.6 ], "layers": [@@ -130,7 +114,97 @@ "description": "Input voltage supply pin (4.5 V to 17 V). Drain terminal of the integrated high-side power NFET; requires local input decoupling capacitance.", "is_pin1": false, "source": {- "geometry": "SOT-23.kicad_mod",+ "geometry": "SOT-23-6.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "4",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 1.1375,+ 0.95+ ],+ "rot": 0.0,+ "size": [+ 1.325,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "4",+ "name": "VFB",+ "type": "input",+ "description": "Converter feedback input. Connect to the output through an external resistor divider that sets the output voltage; internal reference is ~0.768 V (0.749-0.787 V).",+ "is_pin1": false,+ "source": {+ "geometry": "SOT-23-6.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "5",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 1.1375,+ 0.0+ ],+ "rot": 0.0,+ "size": [+ 1.325,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "5",+ "name": "EN",+ "type": "input",+ "description": "Enable input control. Active high; pull above 1.6 V to enable, below 0.8 V to disable. Internal ~400 kΩ pull-down to GND; do not leave floating.",+ "is_pin1": false,+ "source": {+ "geometry": "SOT-23-6.kicad_mod",+ "meaning": "page.json:component.pins",+ "correspondence": "kicad: symbol pin number == pad name"+ }+ },+ {+ "pad": "6",+ "kind": "smd",+ "shape": "roundrect",+ "at": [+ 1.1375,+ -0.95+ ],+ "rot": 0.0,+ "size": [+ 1.325,+ 0.6+ ],+ "layers": [+ "F.Cu",+ "F.Mask",+ "F.Paste"+ ],+ "thermal": false,+ "pin": "6",+ "name": "VBST",+ "type": "power_out",+ "description": "Bootstrap supply for the high-side NFET gate driver. Connect a 0.1 µF ceramic capacitor between VBST and SW.",+ "is_pin1": false,+ "source": {+ "geometry": "SOT-23-6.kicad_mod", "meaning": "page.json:component.pins", "correspondence": "kicad: symbol pin number == pad name" }
page.json+1−1@@ -14,7 +14,7 @@ "component": { "mpn": "TPS563201DDCR", "manufacturer": "Texas Instruments",- "package": "SOT-23-THIN-6",+ "package": "SOT-23-6", "pin_count": 6, "category": "PMIC", "subcategory": "DC-DC Converters",
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tps563201ddcr.lbr+61−34@@ -50,51 +50,78 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description>SOT-23 (symbol synthesized from footprint pads)</description>+<description></description> <packages>-<package name="SOT-23">- <description>SOT-23</description>- <smd name="1" x="-0.9375" y="0.9500" dx="1.4750" dy="0.6000" layer="1"/>- <smd name="2" x="-0.9375" y="-0.9500" dx="1.4750" dy="0.6000" layer="1"/>- <smd name="3" x="0.9375" y="-0.0000" dx="1.4750" dy="0.6000" layer="1"/>- <wire x1="-0.7600" y1="1.5600" x2="0.7600" y2="1.5600" width="0.1200" layer="21"/>- <wire x1="-0.7600" y1="1.5100" x2="-0.7600" y2="1.5600" width="0.1200" layer="21"/>- <wire x1="-0.7600" y1="-0.3900" x2="-0.7600" y2="0.3900" width="0.1200" layer="21"/>- <wire x1="-0.7600" y1="-1.5600" x2="-0.7600" y2="-1.5100" width="0.1200" layer="21"/>- <wire x1="0.7600" y1="1.5600" x2="0.7600" y2="0.5600" width="0.1200" layer="21"/>- <wire x1="0.7600" y1="-0.5600" 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width="0.254" layer="94"/>+ <wire x1="12.7" y1="5.08" x2="12.7" y2="-5.08" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-5.08" x2="-12.7" y2="-5.08" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-5.08" x2="-12.7" y2="5.08" width="0.254" layer="94"/>+ <text x="0" y="7.62" size="1.27" layer="95" align="bottom-center">>NAME</text>+ <text x="0" y="-7.62" size="1.27" layer="96" align="top-center">>VALUE</text>+ <pin name="GND" x="-17.78" y="2.54" length="middle" direction="pwr"/>+ <pin name="SW" x="-17.78" y="0" length="middle" direction="out"/>+ <pin name="VIN" x="-17.78" y="-2.54" length="middle" direction="pwr"/>+ <pin name="VBST" x="17.78" y="2.54" length="middle" direction="out" rot="R180"/>+ <pin name="EN" x="17.78" y="0" length="middle" direction="in" rot="R180"/>+ <pin name="VFB" x="17.78" y="-2.54" length="middle" direction="in" rot="R180"/> </symbol> </symbols> <devicesets>-<deviceset name="SOT-23" prefix="U">- <description>SOT-23 (symbol synthesized from footprint pads)</description>+<deviceset name="TPS563201DDCR" prefix="U">+ <description></description> <gates>- <gate name="G$1" symbol="SOT-23" x="0" y="0"/>+ <gate name="G$1" symbol="TPS563201DDCR" x="0" y="0"/> </gates> <devices>- <device name="" package="SOT-23">+ <device name="" package="TPS563201DDCR"> <connects>- <connect gate="G$1" pin="1" pad="1"/>- <connect gate="G$1" pin="2" pad="2"/>- <connect gate="G$1" pin="3" pad="3"/>+ <connect gate="G$1" pin="GND" pad="1"/>+ <connect gate="G$1" pin="SW" pad="2"/>+ <connect gate="G$1" pin="VIN" pad="3"/>+ <connect gate="G$1" pin="VBST" pad="6"/>+ <connect gate="G$1" pin="EN" pad="5"/>+ <connect gate="G$1" pin="VFB" pad="4"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="TPS563201DDCR" constant="no"/>+ <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+ <attribute name="DIGIKEY_PN" value="296-47238-2-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C116592" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>