TPS54540DDAR

@@ -0,0 +1,49 @@+# TPS54540DDAR++**Texas Instruments** · DC-DC Converters · SOIC-8-EP++TPS54540DDAR from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | output | Bootstrap capacitor node. A bootstrap capacitor is required between BOOT and SW to drive the internal high-side MOSFET gate. If the voltage on this capacitor is below the minimum required, the output switching is halted until the capacitor is refreshed. Absolute max BOOT-SW = 8 V. |+| 2 | VIN | power_in | Input supply voltage. Operating range 4.5 V to 42 V (absolute max 45 V). Bypass locally with a low-ESR ceramic capacitor to GND. |+| 3 | EN | input | Enable input with internal pull-up current source. Pull below 1.2 V to disable the converter; float to enable. Can be used with an external resistor divider to program the input undervoltage lockout threshold. Absolute max 8.4 V. |+| 4 | RT/CLK | bidirectional | Resistor timing and external clock input. An internal amplifier holds this pin at a fixed voltage; connecting an external RT resistor to GND sets the switching frequency (100 kHz-2.5 MHz). Pulling above the PLL upper threshold reconfigures the pin as a high-impedance synchronization clock input (160 kHz-2.3 MHz). If clocking edges stop, the internal PLL is re-enabled and RT-programmed operation resumes. |+| 5 | FB | input | Inverting input of the transconductance (gm) error amplifier. Connect to a feedback resistor divider from VOUT; regulates to the internal 0.8-V (±1%) reference. Absolute max 3 V. |+| 6 | COMP | output | Error amplifier output and input to the output-switch current (PWM) comparator. Connect external frequency-compensation RC network from COMP to GND to shape the control loop. Absolute max 3 V. |+| 7 | GND | power_in | Device ground return. Must be electrically tied to the exposed thermal pad on the PCB for proper operation. |+| 8 | SW | power_out | Switching node; source of the internal high-side power MOSFET. Connect to the external inductor and catch diode. Operating range −0.6 V to 45 V (−2 V for 10-ns transients). |+| 9 | PAD | power_in | Exposed thermal PowerPAD on package bottom. Must be soldered to the PCB ground plane and electrically connected to the GND pin (pin 7) for proper thermal and electrical operation. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8-EP |+| Category | PMIC |+| Pins | 9 |++## Ordering variants++- `TPS54540DDARDDAR`++## CAD (KiCad official)++- Symbol: `TPS54540DDAR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8-EP (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps54540ddar.pdf) (47 pp, sha256 `880d392af05eecb2`, retrieved 2026-08-17, tier: manufacturer)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps54540ddar-datasheet.pdf)

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