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Initial commit: component/tps5450qddarq1

Ray ·045d25ec4c ·12d ago
2 files changed +193
README.mdadded+46
@@ -0,0 +1,46 @@+# TPS5450QDDARQ1++**Texas Instruments** · DC-DC Converters · SOIC-8-EP++TPS5450QDDARQ1 from Texas Instruments, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BOOT | passive | Boost capacitor connection for high-side FET gate driver; connect 0.01 μF low-ESR capacitor between this pin and PH pin. |+| 2 | NC | unconnected | No internal connection. |+| 3 | NC | unconnected | No internal connection. |+| 4 | VSENSE | input | Feedback voltage input for output voltage regulation; connect to resistive divider network on output voltage. |+| 5 | ENA | input | On/off control input; device stops switching when voltage below 0.5 V; float pin to enable device. |+| 6 | GND | power_in | Ground reference and return path for device; must be connected to thermal pad for proper operation. |+| 7 | VIN | power_in | Input supply voltage (5.5 V to 36 V); must be bypassed to GND with high-quality low-ESR ceramic capacitor located close to device package. |+| 8 | PH | output | Switching node output; source of high-side power MOSFET; connect to external inductor and catch diode. |+| 9 | PowerPAD | power_in | Exposed thermal pad connected to ground; must be soldered to PCB ground plane for proper device operation and thermal management. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8-EP |+| Category | Power Management (PMIC) |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `TPS5450QDDARQ1`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`+- 3D model: SOIC-8-EP (KiCad packages3D, STEP)+- 3D model files: `tps5450qddarq1-etched.step` / `tps5450qddarq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps5450qddarq1.step` / `tps5450qddarq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps5450-q1) (31 pp, sha256 `54c3f25cadbdcce5`, retrieved 2026-09-23, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps5450qddarq1-datasheet.pdf)
page.jsonadded+147
@@ -0,0 +1,147 @@+{+  "slug": "tps5450qddarq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps5450qddarq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps5450qddarq1.kicad_sym",+    "tps5450qddarq1.kicad_mod",+    "tps5450qddarq1.glb",+    "tps5450qddarq1.step",+    "tps5450qddarq1.lbr",+    "docs/hero.png",+    "docs/tps5450qddarq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "TPS5450QDDARQ1",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8-EP",+    "pin_count": 9,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps5450-q1",+    "parts": {+      "symbol": "tps5450qddarq1.kicad_sym",+      "footprint": "tps5450qddarq1.kicad_mod",+      "model_3d": "tps5450qddarq1-etched.glb",+      "model_3d_plain": "tps5450qddarq1.glb",+      "model_3d_step": "tps5450qddarq1-etched.step",+      "model_3d_step_plain": "tps5450qddarq1.step",+      "lbr": "tps5450qddarq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C181270"+    },+    "pins": [+      {+        "number": "1",+        "name": "BOOT",+        "type": "passive",+        "description": "Boost capacitor connection for high-side FET gate driver; connect 0.01 μF low-ESR capacitor between this pin and PH pin."+      },+      {+        "number": "2",+        "name": "NC",+        "type": "unconnected",+        "description": "No internal connection."+      },+      {+        "number": "3",+        "name": "NC",+        "type": "unconnected",+        "description": "No internal connection."+      },+      {+        "number": "4",+        "name": "VSENSE",+        "type": "input",+        "description": "Feedback voltage input for output voltage regulation; connect to resistive divider network on output voltage."+      },+      {+        "number": "5",+        "name": "ENA",+        "type": "input",+        "description": "On/off control input; device stops switching when voltage below 0.5 V; float pin to enable device."+      },+      {+        "number": "6",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference and return path for device; must be connected to thermal pad for proper operation."+      },+      {+        "number": "7",+        "name": "VIN",+        "type": "power_in",+        "description": "Input supply voltage (5.5 V to 36 V); must be bypassed to GND with high-quality low-ESR ceramic capacitor located close to device package."+      },+      {+        "number": "8",+        "name": "PH",+        "type": "output",+        "description": "Switching node output; source of high-side power MOSFET; connect to external inductor and catch diode."+      },+      {+        "number": "9",+        "name": "PowerPAD",+        "type": "power_in",+        "description": "Exposed thermal pad connected to ground; must be soldered to PCB ground plane for proper device operation and thermal management."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 31,+        "cost_usd": 0.2674,+        "at": "2026-09-23T08:10:01"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps5450-q1",+        "pages": 31,+        "sha256": "54c3f25cadbdcce5",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 9,+        "described": 9,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file