component
TPS54360BDDAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 296-TPS54360BDDARTR-ND, LCSC_PN C524806). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.
2 files changed
+22−6
page.json+7−4@@ -26,7 +26,10 @@ "model_3d_step": "tps54360bddar.step", "lbr": "tps54360bddar.lbr" },- "distributor_links": {},+ "distributor_links": {+ "digikey": "296-TPS54360BDDARTR-ND",+ "lcsc": "C524806"+ }, "pins": [ { "number": "1",@@ -56,7 +59,7 @@ "number": "5", "name": "FB", "type": "input",- "description": "Inverting input of the transconductance (gm) error amplifier. Connect the output feedback divider from VOUT to FB and GND (0.8 V ±1% internal reference)."+ "description": "Inverting input of the transconductance (gm) error amplifier. Connect the output feedback divider from VOUT to FB and GND (0.8 V \u00b11% internal reference)." }, { "number": "6",@@ -74,13 +77,13 @@ "number": "8", "name": "SW", "type": "power_out",- "description": "Source of the internal high-side power MOSFET and switching node of the converter. Connect to the output inductor and catch diode. Abs max −0.6 V to 65 V (−2 V for 10-ns transients)."+ "description": "Source of the internal high-side power MOSFET and switching node of the converter. Connect to the output inductor and catch diode. Abs max \u22120.6 V to 65 V (\u22122 V for 10-ns transients)." }, { "number": "9", "name": "PAD", "type": "power_in",- "description": "Exposed thermal PowerPAD on the package bottom. Must be electrically connected to GND (pin 7) on the PCB for proper electrical and thermal operation. Provides the primary heat-sink path (Rθ J-C(bot) = 3.6 °C/W)."+ "description": "Exposed thermal PowerPAD on the package bottom. Must be electrically connected to GND (pin 7) on the PCB for proper electrical and thermal operation. Provides the primary heat-sink path (R\u03b8 J-C(bot) = 3.6 \u00b0C/W)." } ], "provenance": {
tps54360bddar.lbr+15−2@@ -66,6 +66,12 @@ <smd name="9@2" x="-0.6025" y="-0.7750" dx="1.2050" dy="1.5500" layer="1"/> <smd name="9@3" x="0.6025" y="0.7750" dx="1.2050" dy="1.5500" layer="1"/> <smd name="9@4" x="0.6025" y="-0.7750" dx="1.2050" dy="1.5500" layer="1"/>+ <polygon width="0.1200" layer="21">+ <vertex x="-2.5000" y="2.5000"/>+ <vertex x="-2.7400" y="2.8300"/>+ <vertex x="-2.2600" y="2.8300"/>+ <vertex x="-2.5000" y="2.5000"/>+ </polygon> <wire x1="-2.0750" y1="2.5750" x2="2.0750" y2="2.5750" width="0.1500" layer="21"/> <wire x1="-2.0750" y1="-2.5750" x2="2.0750" y2="-2.5750" width="0.1500" layer="21"/> <wire x1="-1.9500" y1="1.4500" x2="-0.9500" y2="2.4500" width="0.1500" layer="51"/>@@ -75,7 +81,7 @@ <wire x1="1.9500" y1="-2.4500" x2="-1.9500" y2="-2.4500" width="0.1500" layer="51"/> <text x="0" y="3.460" size="1.27" layer="25" align="bottom-center">>NAME</text> <text x="0" y="-3.460" size="1.27" layer="27" align="top-center">>VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.5000" y="2.5000"/><vertex x="-2.7400" y="2.8300"/><vertex x="-2.2600" y="2.8300"/><vertex x="-2.5000" y="2.5000"/></polygon></package>+</package> </packages> <symbols> <symbol name="TPS54360BDDAR">@@ -115,7 +121,14 @@ <connect gate="G$1" pin="GND" pad="7"/> <connect gate="G$1" pin="COMP" pad="6"/> </connects>- <technologies><technology name=""/></technologies>+ <technologies>+ <technology name="">+ <attribute name="MPN" value="TPS54360BDDAR" constant="no"/>+ <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+ <attribute name="DIGIKEY_PN" value="296-TPS54360BDDARTR-ND" constant="no"/>+ <attribute name="LCSC_PN" value="C524806" constant="no"/>+ </technology>+ </technologies> </device> </devices> </deviceset>