component
TPS54229DDAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8-EP. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+128−8@@ -1,13 +1,138 @@ {+ "schema_version": 1,+ "type": "component", "slug": "tps54229ddar",+ "title": "TPS54229DDAR",+ "brief": "Texas Instruments DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments DC-DC Converters, SOIC-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "power management (pmic)", "tps54229ddar" ],+ "component": {+ "mpn": "TPS54229DDAR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8-EP",+ "pin_count": 9,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps54229",+ "parts": {+ "symbol": "tps54229ddar.kicad_sym",+ "footprint": "tps54229ddar.kicad_mod",+ "model_3d": "tps54229ddar.glb",+ "model_3d_step": "tps54229ddar.step",+ "lbr": "tps54229ddar.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "VBST",+ "type": "power_in",+ "description": "Bootstrap supply input for the high-side FET gate drive. Connect a 0.1 \u00b5F capacitor between VBST and SW. An internal diode is connected between VREG5 and VBST. Absolute max 26 V (28 V for 10 ns transient); max 6.5 V vs SW."+ },+ {+ "number": "2",+ "name": "VIN",+ "type": "power_in",+ "description": "Input voltage supply pin. Operating range 4.5 V to 18 V (absolute max 20 V). Bypass locally with a low-ESR ceramic capacitor to GND."+ },+ {+ "number": "3",+ "name": "SW",+ "type": "power_out",+ "description": "Switch node - connection between the internal high-side NFET and low-side NFET. Connect to the output inductor. Operating range -1.8 V to 18 V (absolute max -2 V to 20 V; -3 V to 22 V for 10 ns transient)."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Power ground return for the switching circuit. Return sensitive SS and VFB nodes to GND at a single point. Must be tied to the exposed thermal pad."+ },+ {+ "number": "5",+ "name": "VFB",+ "type": "input",+ "description": "Converter feedback input. Connect to the output through a resistor divider that sets Vout via the 0.765 V (typ) internal reference (V_FBTH = 749-781 mV). Input range -0.1 V to 5.5 V."+ },+ {+ "number": "6",+ "name": "VREG5",+ "type": "power_out",+ "description": "5.5 V internal LDO output used for internal bias and gate drive. Decouple with a ~0.47 \u00b5F ceramic capacitor to GND. Output is disabled when EN is low. Max source current 60 mA (IVREG5 rated 0-10 mA externally)."+ },+ {+ "number": "7",+ "name": "EN",+ "type": "input",+ "description": "Enable input, active high. V_ENH \u2265 1.6 V enables the device; V_ENL \u2264 0.6 V disables it. Internal pull-down resistance to GND ~440 k\u03a9 (220-880 k\u03a9). Absolute max 20 V."+ },+ {+ "number": "8",+ "name": "SS",+ "type": "passive",+ "description": "Soft-start control. Connect an external capacitor to GND to program the soft-start ramp; charged by ISSC \u2248 6.0 \u00b5A (4.2-7.8 \u00b5A), discharged by ISSD \u2248 0.2 mA at 0.5 V during shutdown. Input range -0.1 V to 5.7 V."+ },+ {+ "number": "9",+ "name": "PwPd",+ "type": "power_in",+ "description": "Exposed thermal pad on the underside of the package. Must be soldered to the PCB for proper thermal dissipation and must be connected to GND. Voltage from GND to thermal pad is limited to \u00b10.2 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps54229",+ "pages": 28,+ "sha256": "e51079d2c9b40035",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOIC-8-EP",+ "Category": "Power Management (PMIC)",+ "Pins": "9"+ }+ },+ "variants": [+ {+ "mpn": "TPS54229DDAR",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "tps54229ddar"+ ],+ "discovery_pitch": "TPS54229DDAR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +150,5 @@ "docs/tps54229ddar-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }