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Initial commit: component/tps54227ddar

Ray ·89617a4d0e ·12d ago
2 files changed +195
README.mdadded+45
@@ -0,0 +1,45 @@+# TPS54227DDAR++**Texas Instruments** · DC-DC Converters · HSOP-8-EP++TPS54227DDAR from Texas Instruments, in a HSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EN | input | Enable input; active high; must be pulled up to enable device. |+| 2 | VFB | input | Feedback input for output voltage control via resistor divider. |+| 3 | VREG5 | power_out | 5.5-V regulated power output; connect 1-µF capacitor to GND; not active when EN is low. |+| 4 | SS | output | Soft-start control output; connect external capacitor to GND for adjustable soft-start time. |+| 5 | GND | power_in | Power ground return for switching circuit; connect SS and VFB returns at single point. |+| 6 | SW | output | Switch node between high-side and low-side NFET. |+| 7 | VBST | input | Bootstrap supply input for high-side gate driver; connect 0.1-µF capacitor between VBST and SW; internal diode to VREG5. |+| 8 | VIN | power_in | Input voltage supply pin; operating range 4.5-V to 18-V. |+| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HSOP-8-EP |+| Category | Power Management (PMIC) |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `TPS54227DDAR`+- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm`+- 3D model: HSOP-8-EP (KiCad packages3D, STEP)+- 3D model files: `tps54227ddar-etched.step` / `tps54227ddar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps54227ddar.step` / `tps54227ddar.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps54227) (34 pp, sha256 `a490f53babfb5565`, retrieved 2026-09-23, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps54227ddar-datasheet.pdf)
page.jsonadded+150
@@ -0,0 +1,150 @@+{+  "slug": "tps54227ddar",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, HSOP-8-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps54227ddar",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps54227ddar.kicad_sym",+    "tps54227ddar.kicad_mod",+    "tps54227ddar.glb",+    "tps54227ddar.step",+    "tps54227ddar.lbr",+    "docs/hero.png",+    "docs/tps54227ddar-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "TPS54227DDAR",+    "manufacturer": "Texas Instruments",+    "package": "HSOP-8-EP",+    "pin_count": 9,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps54227",+    "parts": {+      "symbol": "tps54227ddar.kicad_sym",+      "footprint": "tps54227ddar.kicad_mod",+      "model_3d": "tps54227ddar-etched.glb",+      "model_3d_plain": "tps54227ddar.glb",+      "model_3d_step": "tps54227ddar-etched.step",+      "model_3d_step_plain": "tps54227ddar.step",+      "lbr": "tps54227ddar.lbr"+    },+    "distributor_links": {+      "lcsc": "C29506"+    },+    "pins": [+      {+        "number": "1",+        "name": "EN",+        "type": "input",+        "description": "Enable input; active high; must be pulled up to enable device."+      },+      {+        "number": "2",+        "name": "VFB",+        "type": "input",+        "description": "Feedback input for output voltage control via resistor divider."+      },+      {+        "number": "3",+        "name": "VREG5",+        "type": "power_out",+        "description": "5.5-V regulated power output; connect 1-µF capacitor to GND; not active when EN is low."+      },+      {+        "number": "4",+        "name": "SS",+        "type": "output",+        "description": "Soft-start control output; connect external capacitor to GND for adjustable soft-start time."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Power ground return for switching circuit; connect SS and VFB returns at single point."+      },+      {+        "number": "6",+        "name": "SW",+        "type": "output",+        "description": "Switch node between high-side and low-side NFET."+      },+      {+        "number": "7",+        "name": "VBST",+        "type": "input",+        "description": "Bootstrap supply input for high-side gate driver; connect 0.1-µF capacitor between VBST and SW; internal diode to VREG5."+      },+      {+        "number": "8",+        "name": "VIN",+        "type": "power_in",+        "description": "Input voltage supply pin; operating range 4.5-V to 18-V."+      },+      {+        "number": "9",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Exposed thermal pad (PGND) on underside of package must be soldered to ground plane for thermal diss",+          "exposed pad 9 added from the footprint"+        ],+        "pages_sent": 34,+        "cost_usd": 0.2817,+        "at": "2026-09-23T19:36:58"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps54227",+        "pages": 34,+        "sha256": "a490f53babfb5565",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 9,+        "described": 9,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file