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TPS40422RHAR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, WQFN-40-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+78@@ -0,0 +1,78 @@+# TPS40422RHAR++**Texas Instruments** · DC-DC Converters · WQFN-40-EP(6x6)++TPS40422RHAR from Texas Instruments, in a WQFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RT | input | Frequency programming pin; connect a resistor from RT to AGND to set the oscillator frequency. |+| 2 | FB1 | input | Inverting input of the CH1 error amplifier; connect a voltage divider between DIFFO1 and AGND to program the CH1 output voltage. |+| 3 | COMP1 | output | Output of the CH1 error amplifier and connection node for loop feedback components. |+| 4 | CNTL1 | input | Logic-level input controlling CH1 startup and shutdown as set by PMBus options; when floating it is pulled up to BP6 by an internal 6-µA current source. |+| 5 | CNTL2 | input | Logic-level input controlling CH2 startup and shutdown as set by PMBus options; when floating it is pulled up to BP6 by an internal 6-µA current source. |+| 6 | AGND | power_in | Low-noise ground connection to the controller; power-level currents should not flow through the AGND path. |+| 7 | COMP2 | output | Output of the CH2 error amplifier and loop feedback connection; for two-phase operation, connect COMP2 to COMP1. |+| 8 | FB2 | input | Inverting input of the CH2 error amplifier; connect a voltage divider between VOUT2 and GND to program the CH2 output, or connect to BP6 for two-phase operation. |+| 9 | ADDR1 | input | High-order PMBus address pin; one of eight resistor values from this pin to AGND selects the high-order octal digit of the address. |+| 10 | ADDR0 | input | Low-order PMBus address pin; one of eight resistor values from this pin to AGND selects the low-order octal digit of the address. |+| 11 | DATA | bidirectional | Data input/output for the PMBus interface; pull up to 3.3 V with a resistor. |+| 12 | CLK | input | Clock input for the PMBus interface; pull up to 3.3 V with a resistor. |+| 13 | SMBALRT | output | Alert output for the PMBus interface; pull up to 3.3 V with a resistor. |+| 14 | GSNS2 | input | Negative terminal of the CH2 differential remote sense amplifier. |+| 15 | VSNS2 | input | Positive terminal of the CH2 differential remote sense amplifier. |+| 16 | TSNS2 | input | External temperature sense input for CH2. |+| 17 | CS2N | input | Negative terminal of the CH2 current sense amplifier. |+| 18 | CS2P | input | Positive terminal of the CH2 current sense amplifier. |+| 19 | PG2 | output | Open-drain power-good indicator for the CH2 output voltage. |+| 20 | BOOT2 | input | Bootstrapped supply for the CH2 high-side FET driver; connect a 100 nF (typical) capacitor from BOOT2 to SW2. |+| 21 | HDRV2 | output | Bootstrapped gate drive output for the CH2 high-side N-channel MOSFET. |+| 22 | SW2 | input | Return of the CH2 high-side gate driver; connect to the CH2 switched node. |+| 23 | LDRV2 | output | Gate drive output for the CH2 low-side synchronous rectifier N-channel MOSFET. |+| 24 | BPEXT | input | External voltage input for BP6 switchover; if unused, connect to PGND via a 10-kΩ resistor, otherwise use a 100-nF or larger capacitor to PGND (maximum suggested 10 µF). |+| 25 | BP6 | power_out | Output bypass for the internal 6.5-V regulator; connect a low-ESR 1 µF or larger ceramic capacitor to PGND (maximum suggested 10 µF). |+| 26 | PGND | power_in | Power ground. |+| 27 | LDRV1 | output | Gate drive output for the CH1 low-side synchronous rectifier N-channel MOSFET. |+| 28 | SW1 | input | Return of the CH1 high-side gate driver; connect to the CH1 switched node. |+| 29 | HDRV1 | output | Bootstrapped gate drive output for the CH1 high-side N-channel MOSFET. |+| 30 | BOOT1 | input | Bootstrapped supply for the CH1 high-side FET driver; connect a 100 nF (typical) capacitor from BOOT1 to SW1. |+| 31 | VDD | power_in | Power input to the controller; connect a low-ESR 100 nF or larger ceramic capacitor from VDD to AGND, with operating input voltage 4.5 V to 20 V. |+| 32 | BP3 | power_out | Output bypass for the internal 3.3-V regulator; connect a 100 nF or larger capacitor to AGND (maximum suggested 10 µF). |+| 33 | PG1 | output | Open-drain power-good indicator for the CH1 output voltage. |+| 34 | CS1P | input | Positive terminal of the CH1 current sense amplifier. |+| 35 | CS1N | input | Negative terminal of the CH1 current sense amplifier. |+| 36 | TSNS1 | input | External temperature sense input for CH1. |+| 37 | VSNS1 | input | Positive terminal of the CH1 differential remote sense amplifier. |+| 38 | GSNS1 | input | Negative terminal of the CH1 differential remote sense amplifier. |+| 39 | DIFFO1 | output | Output of the CH1 differential remote sense amplifier, which feeds the CH1 feedback divider. |+| 40 | SYNC | input | Logic-level input for external clock synchronization; when an external clock is applied, the switching frequency is one half of the clock frequency, and the pin is tied to AGND when unused. |+| 41 | PWPD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-40-EP(6x6) |+| Category | Power Management (PMIC) |+| Pins | 41 |++## CAD (KiCad official)++- Symbol: `TPS40422RHAR`+- Footprint: `Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm`+- 3D model: WQFN-40-EP(6x6) (KiCad packages3D, STEP)+- 3D model files: `tps40422rhar-etched.step` / `tps40422rhar-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps40422rhar.step` / `tps40422rhar.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps40422) (77 pp, sha256 `5149865e86388b29`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps40422rhar-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps40422rhar",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps40422rhar.kicad_sym",+ "tps40422rhar.kicad_mod",+ "tps40422rhar.glb",+ "tps40422rhar.step",+ "tps40422rhar.lbr",+ "docs/hero.png",+ "docs/tps40422rhar-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps40422rhar-hero.glb",+ "tps40422rhar-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS40422RHAR",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-40-EP(6x6)",+ "pin_count": 41,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps40422",+ "parts": {+ "symbol": "tps40422rhar.kicad_sym",+ "footprint": "tps40422rhar.kicad_mod",+ "model_3d": "tps40422rhar-hero.glb",+ "model_3d_plain": "tps40422rhar.glb",+ "model_3d_step": "tps40422rhar-etched.step",+ "model_3d_step_plain": "tps40422rhar.step",+ "lbr": "tps40422rhar.lbr"+ },+ "distributor_links": {+ "lcsc": "C702246",+ "digikey": "296-TPS40422RHARTR-ND",+ "mouser": "595-TPS40422RHAR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T04:21:24Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS40422RHARTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS40422RHAR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "RT",+ "type": "input",+ "description": "Frequency programming pin; connect a resistor from RT to AGND to set the oscillator frequency."+ },+ {+ "number": "2",+ "name": "FB1",+ "type": "input",+ "description": "Inverting input of the CH1 error amplifier; connect a voltage divider between DIFFO1 and AGND to program the CH1 output voltage."+ },+ {+ "number": "3",+ "name": "COMP1",+ "type": "output",+ "description": "Output of the CH1 error amplifier and connection node for loop feedback components."+ },+ {+ "number": "4",+ "name": "CNTL1",+ "type": "input",+ "description": "Logic-level input controlling CH1 startup and shutdown as set by PMBus options; when floating it is pulled up to BP6 by an internal 6-µA current source."+ },+ {+ "number": "5",+ "name": "CNTL2",+ "type": "input",+ "description": "Logic-level input controlling CH2 startup and shutdown as set by PMBus options; when floating it is pulled up to BP6 by an internal 6-µA current source."+ },+ {+ "number": "6",+ "name": "AGND",+ "type": "power_in",+ "description": "Low-noise ground connection to the controller; power-level currents should not flow through the AGND path."+ },+ {+ "number": "7",+ "name": "COMP2",+ "type": "output",+ "description": "Output of the CH2 error amplifier and loop feedback connection; for two-phase operation, connect COMP2 to COMP1."+ },+ {+ "number": "8",+ "name": "FB2",+ "type": "input",+ "description": "Inverting input of the CH2 error amplifier; connect a voltage divider between VOUT2 and GND to program the CH2 output, or connect to BP6 for two-phase operation."+ },+ {+ "number": "9",+ "name": "ADDR1",+ "type": "input",+ "description": "High-order PMBus address pin; one of eight resistor values from this pin to AGND selects the high-order octal digit of the address."+ },+ {+ "number": "10",+ "name": "ADDR0",+ "type": "input",+ "description": "Low-order PMBus address pin; one of eight resistor values from this pin to AGND selects the low-order octal digit of the address."+ },+ {+ "number": "11",+ "name": "DATA",+ "type": "bidirectional",+ "description": "Data input/output for the PMBus interface; pull up to 3.3 V with a resistor."+ },+ {+ "number": "12",+ "name": "CLK",+ "type": "input",+ "description": "Clock input for the PMBus interface; pull up to 3.3 V with a resistor."+ },+ {+ "number": "13",+ "name": "SMBALRT",+ "type": "output",+ "description": "Alert output for the PMBus interface; pull up to 3.3 V with a resistor."+ },+ {+ "number": "14",+ "name": "GSNS2",+ "type": "input",+ "description": "Negative terminal of the CH2 differential remote sense amplifier."+ },+ {+ "number": "15",+ "name": "VSNS2",+ "type": "input",+ "description": "Positive terminal of the CH2 differential remote sense amplifier."+ },+ {+ "number": "16",+ "name": "TSNS2",+ "type": "input",+ "description": "External temperature sense input for CH2."+ },+ {+ "number": "17",+ "name": "CS2N",+ "type": "input",+ "description": "Negative terminal of the CH2 current sense amplifier."+ },+ {+ "number": "18",+ "name": "CS2P",+ "type": "input",+ "description": "Positive terminal of the CH2 current sense amplifier."+ },+ {+ "number": "19",+ "name": "PG2",+ "type": "output",+ "description": "Open-drain power-good indicator for the CH2 output voltage."+ },+ {+ "number": "20",+ "name": "BOOT2",+ "type": "input",+ "description": "Bootstrapped supply for the CH2 high-side FET driver; connect a 100 nF (typical) capacitor from BOOT2 to SW2."+ },+ {+ "number": "21",+ "name": "HDRV2",+ "type": "output",+ "description": "Bootstrapped gate drive output for the CH2 high-side N-channel MOSFET."+ },+ {+ "number": "22",+ "name": "SW2",+ "type": "input",+ "description": "Return of the CH2 high-side gate driver; connect to the CH2 switched node."+ },+ {+ "number": "23",+ "name": "LDRV2",+ "type": "output",+ "description": "Gate drive output for the CH2 low-side synchronous rectifier N-channel MOSFET."+ },+ {+ "number": "24",+ "name": "BPEXT",+ "type": "input",+ "description": "External voltage input for BP6 switchover; if unused, connect to PGND via a 10-kΩ resistor, otherwise use a 100-nF or larger capacitor to PGND (maximum suggested 10 µF)."+ },+ {+ "number": "25",+ "name": "BP6",+ "type": "power_out",+ "description": "Output bypass for the internal 6.5-V regulator; connect a low-ESR 1 µF or larger ceramic capacitor to PGND (maximum suggested 10 µF)."+ },+ {+ "number": "26",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground."+ },+ {+ "number": "27",+ "name": "LDRV1",+ "type": "output",+ "description": "Gate drive output for the CH1 low-side synchronous rectifier N-channel MOSFET."+ },+ {+ "number": "28",+ "name": "SW1",+ "type": "input",+ "description": "Return of the CH1 high-side gate driver; connect to the CH1 switched node."+ },+ {+ "number": "29",+ "name": "HDRV1",+ "type": "output",+ "description": "Bootstrapped gate drive output for the CH1 high-side N-channel MOSFET."+ },+ {+ "number": "30",+ "name": "BOOT1",+ "type": "input",+ "description": "Bootstrapped supply for the CH1 high-side FET driver; connect a 100 nF (typical) capacitor from BOOT1 to SW1."+ },+ {+ "number": "31",+ "name": "VDD",+ "type": "power_in",+ "description": "Power input to the controller; connect a low-ESR 100 nF or larger ceramic capacitor from VDD to AGND, with operating input voltage 4.5 V to 20 V."+ },+ {+ "number": "32",+ "name": "BP3",+ "type": "power_out",+ "description": "Output bypass for the internal 3.3-V regulator; connect a 100 nF or larger capacitor to AGND (maximum suggested 10 µF)."+ },+ {+ "number": "33",+ "name": "PG1",+ "type": "output",+ "description": "Open-drain power-good indicator for the CH1 output voltage."+ },+ {+ "number": "34",+ "name": "CS1P",+ "type": "input",+ "description": "Positive terminal of the CH1 current sense amplifier."+ },+ {+ "number": "35",+ "name": "CS1N",+ "type": "input",+ "description": "Negative terminal of the CH1 current sense amplifier."+ },+ {+ "number": "36",+ "name": "TSNS1",+ "type": "input",+ "description": "External temperature sense input for CH1."+ },+ {+ "number": "37",+ "name": "VSNS1",+ "type": "input",+ "description": "Positive terminal of the CH1 differential remote sense amplifier."+ },+ {+ "number": "38",+ "name": "GSNS1",+ "type": "input",+ "description": "Negative terminal of the CH1 differential remote sense amplifier."+ },+ {+ "number": "39",+ "name": "DIFFO1",+ "type": "output",+ "description": "Output of the CH1 differential remote sense amplifier, which feeds the CH1 feedback divider."+ },+ {+ "number": "40",+ "name": "SYNC",+ "type": "input",+ "description": "Logic-level input for external clock synchronization; when an external clock is applied, the switching frequency is one half of the clock frequency, and the pin is tied to AGND when unused."+ },+ {+ "number": "41",+ "name": "PWPD",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package hint mismatch: the MPN TPS40422RHAR is the VQFN (RHA) 40-pin 6 mm x 6 mm, 0.5 mm pitch packa; The exposed thermal pad of the RHA package is not given a pin number in Table 6-1 or the pin figures; Pin types are mapped from the datasheet I/O column to KiCad ERC classes: AGND, PGND and VDD are powe",+ "exposed pad 41 added from the footprint"+ ],+ "pages_sent": 14,+ "cost_usd": 0.1188,+ "at": "2026-10-08T04:21:05"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps40422",+ "pages": 77,+ "sha256": "5149865e86388b29",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 41,+ "described": 41,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps40422rhar.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 6,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e5b4286c2329085d9ef7f90d5eb5bf41a435241ecc1baaf1383823b6d6a946ae",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps40422rhar-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 6,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "4390de856a3a2de2f72df7b217b62b2d3351ebdd4efedce79e95033f7018c895",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}