component
TPS40200DRBT
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HVSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# TPS40200DRBT++**Texas Instruments** · DC-DC Converters · HVSON-8-EP(3x3)++TPS40200DRBT from Texas Instruments, in a HVSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RC | input | Switching frequency setting RC network: connect a capacitor from RC to GND and a resistor from VDD to RC, and the pin may be synchronized by an external open-drain clock pulled to GND; absolute maximum range is -0.3 V to 5.5 V. |+| 2 | SS | input | Soft-start programming pin: a capacitor from SS to GND sets the soft-start time, pulling it below 150 mV stops output switching (shutdown), and it also serves as the overcurrent restart timer; absolute maximum range is -0.3 V to 9.0 V. |+| 3 | COMP | output | Error amplifier output: connect the control-loop compensation network from COMP to FB; absolute maximum range is -0.3 V to 9.0 V. |+| 4 | FB | input | Error amplifier inverting input: connect the feedback resistor network center tap to this pin; absolute maximum range is -0.3 V to 5.5 V. |+| 5 | GND | power_in | Device ground. |+| 6 | GDRV | output | Driver output for an external P-channel MOSFET, with the absolute maximum range stated as VIN - 10 V to VIN. |+| 7 | ISNS | input | Current-sense comparator input: connect a current sense resistor between ISNS and VDD to set the desired overcurrent threshold; absolute maximum range is -0.3 V to 52 V. |+| 8 | VDD | power_in | System input voltage (4.5 V to 52 V recommended operating range): connect a local bypass capacitor from VDD to GND. |+| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HVSON-8-EP(3x3) |+| Category | Power Management (PMIC) |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `TPS40200DRBT`+- Footprint: `Package_SON:HVSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm`+- 3D model: HVSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `tps40200drbt-etched.step` / `tps40200drbt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps40200drbt.step` / `tps40200drbt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps40200) (52 pp, sha256 `a3e23ec7367038ec`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps40200drbt-datasheet.pdf)
page.jsonadded+207@@ -0,0 +1,207 @@+{+ "slug": "tps40200drbt",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, HVSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps40200drbt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps40200drbt.kicad_sym",+ "tps40200drbt.kicad_mod",+ "tps40200drbt.glb",+ "tps40200drbt.step",+ "tps40200drbt.lbr",+ "docs/hero.png",+ "docs/tps40200drbt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps40200drbt-hero.glb",+ "tps40200drbt-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS40200DRBT",+ "manufacturer": "Texas Instruments",+ "package": "HVSON-8-EP(3x3)",+ "pin_count": 9,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps40200",+ "parts": {+ "symbol": "tps40200drbt.kicad_sym",+ "footprint": "tps40200drbt.kicad_mod",+ "model_3d": "tps40200drbt-hero.glb",+ "model_3d_plain": "tps40200drbt.glb",+ "model_3d_step": "tps40200drbt-etched.step",+ "model_3d_step_plain": "tps40200drbt.step",+ "lbr": "tps40200drbt.lbr"+ },+ "distributor_links": {+ "lcsc": "C1848482",+ "digikey": "296-TPS40200DRBTTR-ND",+ "mouser": "595-TPS40200DRBT"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:32:59Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS40200DRBTTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS40200DRBT",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "RC",+ "type": "input",+ "description": "Switching frequency setting RC network: connect a capacitor from RC to GND and a resistor from VDD to RC, and the pin may be synchronized by an external open-drain clock pulled to GND; absolute maximum range is -0.3 V to 5.5 V."+ },+ {+ "number": "2",+ "name": "SS",+ "type": "input",+ "description": "Soft-start programming pin: a capacitor from SS to GND sets the soft-start time, pulling it below 150 mV stops output switching (shutdown), and it also serves as the overcurrent restart timer; absolute maximum range is -0.3 V to 9.0 V."+ },+ {+ "number": "3",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output: connect the control-loop compensation network from COMP to FB; absolute maximum range is -0.3 V to 9.0 V."+ },+ {+ "number": "4",+ "name": "FB",+ "type": "input",+ "description": "Error amplifier inverting input: connect the feedback resistor network center tap to this pin; absolute maximum range is -0.3 V to 5.5 V."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground."+ },+ {+ "number": "6",+ "name": "GDRV",+ "type": "output",+ "description": "Driver output for an external P-channel MOSFET, with the absolute maximum range stated as VIN - 10 V to VIN."+ },+ {+ "number": "7",+ "name": "ISNS",+ "type": "input",+ "description": "Current-sense comparator input: connect a current sense resistor between ISNS and VDD to set the desired overcurrent threshold; absolute maximum range is -0.3 V to 52 V."+ },+ {+ "number": "8",+ "name": "VDD",+ "type": "power_in",+ "description": "System input voltage (4.5 V to 52 V recommended operating range): connect a local bypass capacitor from VDD to GND."+ },+ {+ "number": "9",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package naming mismatch: the package hint says HVSON-8-EP(3x3), but the datasheet names this package; The exposed thermal pad of the DRB package is not given a pin number anywhere in the provided text, ; The datasheet classifies VDD as I (input). It was mapped to KiCad power_in because it is the system ",+ "exposed pad 9 added from the footprint"+ ],+ "pages_sent": 7,+ "cost_usd": 0.0526,+ "at": "2026-10-08T18:32:23"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps40200",+ "pages": 52,+ "sha256": "a3e23ec7367038ec",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps40200drbt.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3.02,+ 3,+ 0.9+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "6a49d67247c513db20d14c427f0863edf58a1b454718a0755803b1de710e8bcc",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps40200drbt-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3.02,+ 3,+ 0.9+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "99d30c237c9fbb59838504c19c7152f2cc62e9d1d495010d3d333d4cde46e98a",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}