component
TPS40057PWP
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+54@@ -0,0 +1,54 @@+# TPS40057PWP++**Texas Instruments** · DC-DC Converters · HTSSOP-16-EP++TPS40057PWP from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | KFF | input | Resistor connection to VIN for voltage feedforward and UVLO level programming. |+| 2 | RT | input | Resistor connection to ground for internal oscillator and switching frequency programming. |+| 3 | BP5 | power_out | 5-V reference output, bypass with 0.1-µF capacitor, maximum 1 mA external load. |+| 4 | SYNC | input | Synchronization input to synchronize oscillator to external frequency or connect to SGND if unused. |+| 5 | SGND | power_in | Signal ground reference for the device. |+| 6 | SS/SD | input | Soft-start/shutdown pin with 2.3 µA charging current; output rise at 0.85 V, regulation at 1.55 V, shutdown below 125 mV. |+| 7 | VFB | input | Inverting input to error amplifier, equal to internal 0.7 V reference in normal operation. |+| 8 | COMP | output | Error amplifier output and PWM comparator input, internally clamped for improved large signal transient response. |+| 9 | PGND | power_in | Power ground reference with low-impedance path to lower MOSFET source. |+| 10 | LDRV | output | Gate drive output for N-channel synchronous rectifier, switches from BP10 (on) to ground (off). |+| 11 | BP10 | power_out | 10-V reference for N-channel synchronous rectifier gate drive, maximum 1 mA external load, bypass with 1-µF capacitor. |+| 12 | SW | input | Switched node connection for overcurrent sensing and zero current detection. |+| 13 | HDRV | output | Floating gate drive output for high-side N-channel MOSFET, switches from BOOST (on) to SW (off). |+| 14 | BOOST | output | Gate drive voltage output for high-side MOSFET, 9 V greater than SW voltage; connect 0.1-µF capacitor to lower MOSFET drain. |+| 15 | VIN | power_in | Supply voltage input, 8 V to 40 V recommended operating range. |+| 16 | ILIM | input | Current limit setting pin with internal current sink for overcurrent threshold programming compared to high-side MOSFET voltage drop. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-16-EP |+| Category | Power Management (PMIC) |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `TPS40057PWP`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `tps40057pwp-etched.step` / `tps40057pwp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps40057pwp.step` / `tps40057pwp.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps40057) (43 pp, sha256 `8efd3db408deb44b`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps40057pwp-datasheet.pdf)
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output rise at 0.85 V, regulation at 1.55 V, shutdown below 125 mV."+ },+ {+ "number": "7",+ "name": "VFB",+ "type": "input",+ "description": "Inverting input to error amplifier, equal to internal 0.7 V reference in normal operation."+ },+ {+ "number": "8",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output and PWM comparator input, internally clamped for improved large signal transient response."+ },+ {+ "number": "9",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground reference with low-impedance path to lower MOSFET source."+ },+ {+ "number": "10",+ "name": "LDRV",+ "type": "output",+ "description": "Gate drive output for N-channel synchronous rectifier, switches from BP10 (on) to ground (off)."+ },+ {+ "number": "11",+ "name": "BP10",+ "type": "power_out",+ "description": "10-V reference for N-channel synchronous rectifier gate drive, maximum 1 mA external load, bypass with 1-µF capacitor."+ },+ {+ "number": "12",+ "name": "SW",+ "type": "input",+ "description": "Switched node connection for overcurrent sensing and zero current detection."+ },+ {+ "number": "13",+ "name": "HDRV",+ "type": "output",+ "description": "Floating gate drive output for high-side N-channel MOSFET, switches from BOOST (on) to SW (off)."+ },+ {+ "number": "14",+ "name": "BOOST",+ "type": "output",+ "description": "Gate drive voltage output for high-side MOSFET, 9 V greater than SW voltage; connect 0.1-µF capacitor to lower MOSFET drain."+ },+ {+ "number": "15",+ "name": "VIN",+ "type": "power_in",+ "description": "Supply voltage input, 8 V to 40 V recommended operating range."+ },+ {+ "number": "16",+ "name": "ILIM",+ "type": "input",+ "description": "Current limit setting pin with internal current sink for overcurrent threshold programming compared to high-side MOSFET voltage drop."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 8,+ "cost_usd": 0.1277,+ "at": "2026-10-07T08:25:26"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps40057",+ "pages": 43,+ "sha256": "8efd3db408deb44b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps40057pwp.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps40057pwp-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "315804ad4a9f4c3316cacc0dbb24ea592305904c3ef43b058e9c8019eb98ac2f",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}