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Initial commit: component/tps3899dl08dser

Ray ·4bbfae46cd ·3d ago
2 files changed +189
README.mdadded+43
@@ -0,0 +1,43 @@+# TPS3899DL08DSER++**Texas Instruments** · Supervisor And Reset ICs · WSON-6(1.5x1.5)++TPS3899DL08DSER from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | CTR | passive | User-adjustable reset delay capacitor pin; connecting to ground-referenced capacitor (range 0-10µF) sets the RESET delay time to deassert. |+| 2 | CTS | passive | User-adjustable sense delay capacitor pin; connecting to ground-referenced capacitor (range 0-10µF) sets the RESET delay time to assert. |+| 3 | GND | power_in | Ground. |+| 4 | VDD | power_in | Supply voltage pin (0.85V to 6V for DL variant) with recommended 0.1µF ceramic capacitor placement. |+| 5 | SENSE | input | Input pin for monitored voltage that asserts RESET when voltage drops below negative threshold VIT− and releases when voltage rises above VIT− + VHYS; supports optional 10nF-100nF ceramic capacitor. |+| 6 | RESET | output | Open-drain active-low output that asserts to logic low when monitored voltage drops below threshold VIT− after CTS delay and remains low until SENSE rises above VIT− + VHYS and CTR delay expires. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-6(1.5x1.5) |+| Category | Power Management (PMIC) |+| Pins | 6 |++## CAD (KiCad official)++- Symbol: `TPS3899DL08DSER`+- Footprint: `Package_SON:WSON-6_1.5x1.5mm_P0.5mm`+- 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)+- 3D model files: `tps3899dl08dser-etched.step` / `tps3899dl08dser-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3899dl08dser.step` / `tps3899dl08dser.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3899) (36 pp, sha256 `d206381355830c12`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps3899dl08dser-datasheet.pdf)
page.jsonadded+146
@@ -0,0 +1,146 @@+{+  "slug": "tps3899dl08dser",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Supervisor And Reset ICs, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps3899dl08dser",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps3899dl08dser.kicad_sym",+    "tps3899dl08dser.kicad_mod",+    "tps3899dl08dser.glb",+    "tps3899dl08dser.step",+    "tps3899dl08dser.lbr",+    "docs/hero.png",+    "docs/tps3899dl08dser-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps3899dl08dser-hero.glb",+    "tps3899dl08dser-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS3899DL08DSER",+    "manufacturer": "Texas Instruments",+    "package": "WSON-6(1.5x1.5)",+    "pin_count": 6,+    "category": "Power Management (PMIC)",+    "subcategory": "Supervisor And Reset ICs",+    "datasheet": "https://www.ti.com/cn/lit/gpn/tps3899",+    "parts": {+      "symbol": "tps3899dl08dser.kicad_sym",+      "footprint": "tps3899dl08dser.kicad_mod",+      "model_3d": "tps3899dl08dser-hero.glb",+      "model_3d_plain": "tps3899dl08dser.glb",+      "model_3d_step": "tps3899dl08dser-etched.step",+      "model_3d_step_plain": "tps3899dl08dser.step",+      "lbr": "tps3899dl08dser.lbr"+    },+    "distributor_links": {+      "lcsc": 3686817,+      "digikey": "296-TPS3899DL08DSERTR-ND",+      "mouser": "595-TPS3899DL08DSER"+    },+    "distributor_check": {+      "checked_at": "2026-10-03T02:54:02Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-TPS3899DL08DSERTR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS3899DL08DSER",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "CTR",+        "type": "passive",+        "description": "User-adjustable reset delay capacitor pin; connecting to ground-referenced capacitor (range 0-10µF) sets the RESET delay time to deassert."+      },+      {+        "number": "2",+        "name": "CTS",+        "type": "passive",+        "description": "User-adjustable sense delay capacitor pin; connecting to ground-referenced capacitor (range 0-10µF) sets the RESET delay time to assert."+      },+      {+        "number": "3",+        "name": "GND",+        "type": "power_in",+        "description": "Ground."+      },+      {+        "number": "4",+        "name": "VDD",+        "type": "power_in",+        "description": "Supply voltage pin (0.85V to 6V for DL variant) with recommended 0.1µF ceramic capacitor placement."+      },+      {+        "number": "5",+        "name": "SENSE",+        "type": "input",+        "description": "Input pin for monitored voltage that asserts RESET when voltage drops below negative threshold VIT− and releases when voltage rises above VIT− + VHYS; supports optional 10nF-100nF ceramic capacitor."+      },+      {+        "number": "6",+        "name": "RESET",+        "type": "output",+        "description": "Open-drain active-low output that asserts to logic low when monitored voltage drops below threshold VIT− after CTS delay and remains low until SENSE rises above VIT− + VHYS and CTR delay expires."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 9,+        "cost_usd": 0.0762,+        "at": "2026-10-03T02:53:40"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/tps3899",+        "pages": 36,+        "sha256": "d206381355830c12",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file