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Set visibility: public

Ray ·a3cbf8af56 ·4d ago ·parent 7921add
1 file changed +6−3
page.json+6−3
@@ -53,7 +53,7 @@         "number": "1",         "name": "RESET",         "type": "tri_state",-        "description": "Active-low open-drain reset output; driven low when MR is pulled to logic low or VDD falls below negative voltage threshold VIT- (1.8V); remains asserted for delay time (tD, 50\u00b5s to 6.2s via CT capacitor) after MR release and VDD rise above VIT- plus 100mV hysteresis."+        "description": "Active-low open-drain reset output; driven low when MR is pulled to logic low or VDD falls below negative voltage threshold VIT- (1.8V); remains asserted for delay time (tD, 50µs to 6.2s via CT capacitor) after MR release and VDD rise above VIT- plus 100mV hysteresis."       },       {         "number": "2",@@ -77,7 +77,7 @@         "number": "5",         "name": "CT",         "type": "passive",-        "description": "Capacitor connection pin for programming reset delay; connect external capacitor to adjust delay from 50\u00b5s to 6.2s, or leave floating for 350\u00b5s fixed delay."+        "description": "Capacitor connection pin for programming reset delay; connect external capacitor to adjust delay from 50µs to 6.2s, or leave floating for 350µs fixed delay."       }     ],     "provenance": {@@ -155,5 +155,8 @@     "docs/tps3840dl18dbvrq1-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file