TPS3808G33DBVR

@@ -32,7 +32,7 @@         "number": "1",         "name": "RESET",         "type": "output",-        "description": "Active-low, open-drain RESET output. Driven to a low-impedance state whenever SENSE is below V_IT (3.07 V typ for the G33 option) or MR is low; released to high-Z after the user-programmed reset delay expires. Requires an external pull-up resistor of 10 k\u03a9 to 1 M\u03a9; the pin may be pulled above V_DD (up to 6.5 V). I_RESET max = 5 mA (absolute max)."+        "description": "Active-low, open-drain RESET output. Driven to a low-impedance state whenever SENSE is below V_IT (3.07 V typ for the G33 option) or MR is low; released to high-Z after the user-programmed reset delay expires. Requires an external pull-up resistor of 10 kΩ to 1 MΩ; the pin may be pulled above V_DD (up to 6.5 V). I_RESET max = 5 mA (absolute max)."       },       {         "number": "2",@@ -44,25 +44,25 @@         "number": "3",         "name": "MR",         "type": "input",-        "description": "Active-low manual reset input. Driving MR low (V_IL \u2264 0.3\u00b7V_DD) asserts RESET; MR must return above V_IH (\u2265 0.7\u00b7V_DD) for RESET to release after the delay. Internally pulled up to V_DD through a ~90 k\u03a9 resistor (70-110 k\u03a9), so the pin may be left unconnected if unused. Minimum input pulse width: 1 \u03bcs."+        "description": "Active-low manual reset input. Driving MR low (V_IL ≤ 0.3·V_DD) asserts RESET; MR must return above V_IH (≥ 0.7·V_DD) for RESET to release after the delay. Internally pulled up to V_DD through a ~90 kΩ resistor (70-110 kΩ), so the pin may be left unconnected if unused. Minimum input pulse width: 1 μs."       },       {         "number": "4",         "name": "CT",         "type": "passive",-        "description": "Reset delay-time programming pin. Leave open for the fixed 20 ms delay, tie to V_DD (through 40 k\u03a9-200 k\u03a9) for the fixed 300 ms delay, or connect a ground-referenced capacitor \u2265 100 pF to program a user delay from 1.25 ms (100 pF) to 10 s (180 nF). Absolute-max voltage: \u22120.3 V to V_DD + 0.3 V."+        "description": "Reset delay-time programming pin. Leave open for the fixed 20 ms delay, tie to V_DD (through 40 kΩ-200 kΩ) for the fixed 300 ms delay, or connect a ground-referenced capacitor ≥ 100 pF to program a user delay from 1.25 ms (100 pF) to 10 s (180 nF). Absolute-max voltage: −0.3 V to V_DD + 0.3 V."       },       {         "number": "5",         "name": "SENSE",         "type": "input",-        "description": "Voltage-monitor input. Connected internally to a precision comparator (0.5% typ threshold accuracy for V_IT \u2264 3.3 V); when the SENSE voltage drops below V_IT (3.07 V typ on the G33 option), RESET is asserted. Input current is 1.7 \u03bcA typ at V_SENSE = 6.5 V. A 1 nF-10 nF bypass to GND is recommended to reduce transient sensitivity."+        "description": "Voltage-monitor input. Connected internally to a precision comparator (0.5% typ threshold accuracy for V_IT ≤ 3.3 V); when the SENSE voltage drops below V_IT (3.07 V typ on the G33 option), RESET is asserted. Input current is 1.7 μA typ at V_SENSE = 6.5 V. A 1 nF-10 nF bypass to GND is recommended to reduce transient sensitivity."       },       {         "number": "6",         "name": "VDD",         "type": "power_in",-        "description": "Supply voltage input. Operating range 1.65 V to 6.5 V (1.7-6.5 V over full \u221240 \u00b0C to +125 \u00b0C range); I_DD = 2.4 \u03bcA typ at V_DD = 3.3 V. A 0.1 \u03bcF ceramic bypass capacitor close to the pin is recommended."+        "description": "Supply voltage input. Operating range 1.65 V to 6.5 V (1.7-6.5 V over full −40 °C to +125 °C range); I_DD = 2.4 μA typ at V_DD = 3.3 V. A 0.1 μF ceramic bypass capacitor close to the pin is recommended."       }     ],     "provenance": {@@ -126,5 +126,8 @@     "docs/tps3808g33dbvr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file