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TPS3703A7080DSERQ1
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Texas Instruments Supervisor And Reset ICs, WSON-6(1.5x1.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+42@@ -0,0 +1,42 @@+# TPS3703A7080DSERQ1++**Texas Instruments** · Supervisor And Reset ICs · WSON-6(1.5x1.5)++TPS3703A7080DSERQ1 from Texas Instruments, in a WSON-6(1.5x1.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SENSE | input | Input for the monitored supply voltage rail; RESET is driven low when SENSE rises above VIT+(OV) or falls below VIT-(UV), with VSENSE rated 0 V to 5.5 V, and SENSE should be tied to VDD to monitor the VDD supply. |+| 2 | VDD | power_in | Supply voltage input rated 1.7 V to 5.5 V (absolute maximum 6 V), with a 0.1-µF ceramic capacitor recommended close to this pin. |+| 3 | CT | input | Capacitor time-delay pin that selects a fixed reset delay when left floating (CT open) or tied to VDD through a pull-up resistor (10 kΩ recommended), and programs the delay when an external capacitor is connected to ground; CT voltage is limited to VDD or 5.5 V, whichever is smaller. |+| 4 | RESET | output | Active-low open-drain output that goes low when SENSE is outside the overvoltage or undervoltage thresholds or during UVLO and manual reset; it requires a pull-up resistor, with output voltage up to 5.5 V and output current from 0.3 mA to 10 mA (absolute maximum ±40 mA). |+| 5 | GND | power_in | Ground reference pin for the device. |+| 6 | MR | input | Manual reset input that asserts RESET when pulled to a logic low (VMR_L), with the reset released after the reset delay time tD expires once MR returns high; MR is internally pulled up to VDD so it may be left floating, and its voltage is rated 0 V to 5.5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WSON-6(1.5x1.5) |+| Category | Power Management (PMIC) |+| Pins | 6 |++## CAD (KiCad official)++- Symbol: `TPS3703A7080DSERQ1`+- Footprint: `Package_SON:WSON-6_1.5x1.5mm_P0.5mm`+- 3D model: WSON-6(1.5x1.5) (KiCad packages3D, STEP)+- 3D model files: `tps3703a7080dserq1-etched.step` / `tps3703a7080dserq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps3703a7080dserq1.step` / `tps3703a7080dserq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps3703-q1) (40 pp, sha256 `05a6581745cb5982`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps3703a7080dserq1-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps3703a7080dserq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps3703a7080dserq1.kicad_sym",+ "tps3703a7080dserq1.kicad_mod",+ "tps3703a7080dserq1.glb",+ "tps3703a7080dserq1.step",+ "tps3703a7080dserq1.lbr",+ "docs/hero.png",+ "docs/tps3703a7080dserq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps3703a7080dserq1-hero.glb",+ "tps3703a7080dserq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS3703A7080DSERQ1",+ "manufacturer": "Texas Instruments",+ "package": "WSON-6(1.5x1.5)",+ "pin_count": 6,+ "category": "Power Management (PMIC)",+ "subcategory": "Supervisor And Reset ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps3703-q1",+ "parts": {+ "symbol": "tps3703a7080dserq1.kicad_sym",+ "footprint": "tps3703a7080dserq1.kicad_mod",+ "model_3d": "tps3703a7080dserq1-hero.glb",+ "model_3d_plain": "tps3703a7080dserq1.glb",+ "model_3d_step": "tps3703a7080dserq1-etched.step",+ "model_3d_step_plain": "tps3703a7080dserq1.step",+ "lbr": "tps3703a7080dserq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C3687441",+ "digikey": "296-TPS3703A7080DSERQ1TR-ND",+ "mouser": "595-S3703A7080DSERQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:09:02Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS3703A7080DSERQ1TR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-S3703A7080DSERQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "SENSE",+ "type": "input",+ "description": "Input for the monitored supply voltage rail; RESET is driven low when SENSE rises above VIT+(OV) or falls below VIT-(UV), with VSENSE rated 0 V to 5.5 V, and SENSE should be tied to VDD to monitor the VDD supply."+ },+ {+ "number": "2",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage input rated 1.7 V to 5.5 V (absolute maximum 6 V), with a 0.1-µF ceramic capacitor recommended close to this pin."+ },+ {+ "number": "3",+ "name": "CT",+ "type": "input",+ "description": "Capacitor time-delay pin that selects a fixed reset delay when left floating (CT open) or tied to VDD through a pull-up resistor (10 kΩ recommended), and programs the delay when an external capacitor is connected to ground; CT voltage is limited to VDD or 5.5 V, whichever is smaller."+ },+ {+ "number": "4",+ "name": "RESET",+ "type": "output",+ "description": "Active-low open-drain output that goes low when SENSE is outside the overvoltage or undervoltage thresholds or during UVLO and manual reset; it requires a pull-up resistor, with output voltage up to 5.5 V and output current from 0.3 mA to 10 mA (absolute maximum ±40 mA)."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference pin for the device."+ },+ {+ "number": "6",+ "name": "MR",+ "type": "input",+ "description": "Manual reset input that asserts RESET when pulled to a logic low (VMR_L), with the reset released after the reset delay time tD expires once MR returns high; MR is internally pulled up to VDD so it may be left floating, and its voltage is rated 0 V to 5.5 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin numbers, names, and functions come from Table 6-1 (page 4). The figure text on page 4 is garbled; The pinout is common to all TPS3703-Q1 DSE-package variants. The MPN TPS3703A7080DSERQ1 is listed in; The datasheet pages provided are 13 of 40. Pages not included may hold additional pin or package det"+ ],+ "pages_sent": 13,+ "cost_usd": 0.0819,+ "at": "2026-10-08T18:08:38"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps3703-q1",+ "pages": 40,+ "sha256": "05a6581745cb5982",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps3703a7080dserq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 1.5,+ 1.48,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b286efb19ee878f7094913552ef4b3d65067278c4f8bce5547303f697797652f",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps3703a7080dserq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 1.5,+ 1.48,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "045f0ebe5334c36368e10dfa1673bf81adc60b183820621f733ff71a844320f9",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}