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TPL9202PWPR
Public Made by Adomby adom
Texas Instruments ADCs/DACs - Special Purpose, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+57@@ -0,0 +1,57 @@+# TPL9202PWPR++**Texas Instruments** · ADCs/DACs - Special Purpose · HTSSOP-20-EP++TPL9202PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BO_OUTZ | output | Brown-out indicator open-drain output, pulled low (≤0.4 V at IOL 100 µA) when input voltage drops below programmed threshold (typically 1.3 V) |+| 2 | OUT1 | output | Low-side driver output 1, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA, controlled via SPI or EN1 enable pin |+| 3 | OUT2 | output | Low-side driver output 2, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA |+| 4 | OUT3 | output | Low-side driver output 3, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA |+| 5 | OUT4 | output | Low-side driver output 4, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA |+| 6 | OUT5 | output | Low-side driver output 5, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA |+| 7 | OUT6 | output | Low-side driver output 6, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA |+| 8 | OUT7 | output | Low-side driver output 7, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA |+| 9 | OUT8 | output | Low-side driver output 8, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA |+| 10 | GND | power_in | Ground/common return |+| 11 | NC | unconnected | No internal connection |+| 12 | EN1 | input | Output 1 enable input (active high), logic levels 0-5.25 V (VIL 0.8 V, VIH 2.4 V), high enables OUT1 regardless of SPI state |+| 13 | RDELAY | output | Reset delay constant current source output (18-48 µA, 28 µA typical), charges external capacitor for programmable power-on reset delay (typically 3-6 ms with 47 nF) |+| 14 | RST | bidirectional | Power-on reset open-drain output, asserted high when 5VOUT regulator ≥4.25 V and RDELAY timeout expires, can function as input or output terminal |+| 15 | MOSI | input | Serial data input for 8-bit SPI protocol, logic levels 0-5.25 V (VIL 0.8 V, VIH 2.4 V) |+| 16 | NCS | input | Chip select input (active low), logic levels 0-5.25 V, gates SPI data transfer when low |+| 17 | SCLK | input | Serial clock input for SPI synchronization (max 4 MHz), logic levels 0-5.25 V, must be held low when NCS high |+| 18 | 5VOUT | power_out | Regulated 5 V output supply, ±5% tolerance (4.75-5.25 V), max current 200 mA, 1 µF bypass capacitor required |+| 19 | VIN | power_in | Unregulated input voltage supply, operating range 7-18 V, internal current draw 3-5 mA depending on output state |+| 20 | BO | input | Brown-out threshold input with external resistor divider from VIN, typical detection threshold 1.3 V |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | Data Acquisition |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `TPL9202PWPR`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `tpl9202pwpr-etched.step` / `tpl9202pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpl9202pwpr.step` / `tpl9202pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tpl9202) (22 pp, sha256 `59c30a13df266f65`, retrieved 2026-10-01, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tpl9202pwpr-datasheet.pdf)
page.jsonadded+234@@ -0,0 +1,234 @@+{+ "slug": "tpl9202pwpr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments ADCs/DACs - Special Purpose, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "tpl9202pwpr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tpl9202pwpr.kicad_sym",+ "tpl9202pwpr.kicad_mod",+ "tpl9202pwpr.glb",+ "tpl9202pwpr.step",+ "tpl9202pwpr.lbr",+ "docs/hero.png",+ "docs/tpl9202pwpr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "TPL9202PWPR",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-20-EP",+ "pin_count": 21,+ "category": "Data Acquisition",+ "subcategory": "ADCs/DACs - Special Purpose",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tpl9202",+ "parts": {+ "symbol": "tpl9202pwpr.kicad_sym",+ "footprint": "tpl9202pwpr.kicad_mod",+ "model_3d": "tpl9202pwpr-etched.glb",+ "model_3d_plain": "tpl9202pwpr.glb",+ "model_3d_step": "tpl9202pwpr-etched.step",+ "model_3d_step_plain": "tpl9202pwpr.step",+ "lbr": "tpl9202pwpr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2653150",+ "digikey": "296-36994-2-ND",+ "mouser": "595-TPL9202PWPR"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T17:54:19Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-36994-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPL9202PWPR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "BO_OUTZ",+ "type": "output",+ "description": "Brown-out indicator open-drain output, pulled low (≤0.4 V at IOL 100 µA) when input voltage drops below programmed threshold (typically 1.3 V)"+ },+ {+ "number": "2",+ "name": "OUT1",+ "type": "output",+ "description": "Low-side driver output 1, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA, controlled via SPI or EN1 enable pin"+ },+ {+ "number": "3",+ "name": "OUT2",+ "type": "output",+ "description": "Low-side driver output 2, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA"+ },+ {+ "number": "4",+ "name": "OUT3",+ "type": "output",+ "description": "Low-side driver output 3, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA"+ },+ {+ "number": "5",+ "name": "OUT4",+ "type": "output",+ "description": "Low-side driver output 4, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA"+ },+ {+ "number": "6",+ "name": "OUT5",+ "type": "output",+ "description": "Low-side driver output 5, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA"+ },+ {+ "number": "7",+ "name": "OUT6",+ "type": "output",+ "description": "Low-side driver output 6, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA"+ },+ {+ "number": "8",+ "name": "OUT7",+ "type": "output",+ "description": "Low-side driver output 7, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA"+ },+ {+ "number": "9",+ "name": "OUT8",+ "type": "output",+ "description": "Low-side driver output 8, 150 mA rated, on-state voltage 0.4-0.7 V at 150 mA"+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground/common return"+ },+ {+ "number": "11",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection"+ },+ {+ "number": "12",+ "name": "EN1",+ "type": "input",+ "description": "Output 1 enable input (active high), logic levels 0-5.25 V (VIL 0.8 V, VIH 2.4 V), high enables OUT1 regardless of SPI state"+ },+ {+ "number": "13",+ "name": "RDELAY",+ "type": "output",+ "description": "Reset delay constant current source output (18-48 µA, 28 µA typical), charges external capacitor for programmable power-on reset delay (typically 3-6 ms with 47 nF)"+ },+ {+ "number": "14",+ "name": "RST",+ "type": "bidirectional",+ "description": "Power-on reset open-drain output, asserted high when 5VOUT regulator ≥4.25 V and RDELAY timeout expires, can function as input or output terminal"+ },+ {+ "number": "15",+ "name": "MOSI",+ "type": "input",+ "description": "Serial data input for 8-bit SPI protocol, logic levels 0-5.25 V (VIL 0.8 V, VIH 2.4 V)"+ },+ {+ "number": "16",+ "name": "NCS",+ "type": "input",+ "description": "Chip select input (active low), logic levels 0-5.25 V, gates SPI data transfer when low"+ },+ {+ "number": "17",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input for SPI synchronization (max 4 MHz), logic levels 0-5.25 V, must be held low when NCS high"+ },+ {+ "number": "18",+ "name": "5VOUT",+ "type": "power_out",+ "description": "Regulated 5 V output supply, ±5% tolerance (4.75-5.25 V), max current 200 mA, 1 µF bypass capacitor required"+ },+ {+ "number": "19",+ "name": "VIN",+ "type": "power_in",+ "description": "Unregulated input voltage supply, operating range 7-18 V, internal current draw 3-5 mA depending on output state"+ },+ {+ "number": "20",+ "name": "BO",+ "type": "input",+ "description": "Brown-out threshold input with external resistor divider from VIN, typical detection threshold 1.3 V"+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 22,+ "cost_usd": 0.3097,+ "at": "2026-10-01T17:53:56"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tpl9202",+ "pages": 22,+ "sha256": "59c30a13df266f65",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}