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TPL0102-100PWR
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Texas Instruments Digital Potentiometers, TSSOP-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+57@@ -0,0 +1,57 @@+# TPL0102-100PWR++**Texas Instruments** · Digital Potentiometers · TSSOP-14++TPL0102-100PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | HA | passive | High terminal of potentiometer A. Analog terminal voltage constrained to VSS − 0.3 V to VDD + 0.3 V; ±2 mA continuous through the resistor string. |+| 2 | LA | passive | Low terminal of potentiometer A. Analog terminal voltage constrained to VSS − 0.3 V to VDD + 0.3 V; ±2 mA continuous. |+| 3 | WA | passive | Wiper terminal of potentiometer A. 256 tap positions across the 100 kΩ string; wiper resistance ~25 Ω typ (100 Ω max); ±2 mA continuous wiper current. |+| 4 | HB | passive | High terminal of potentiometer B. Analog terminal voltage constrained to VSS − 0.3 V to VDD + 0.3 V; ±2 mA continuous. |+| 5 | LB | passive | Low terminal of potentiometer B. Analog terminal voltage constrained to VSS − 0.3 V to VDD + 0.3 V; ±2 mA continuous. |+| 6 | WB | passive | Wiper terminal of potentiometer B. 256 tap positions across the 100 kΩ string; wiper resistance ~25 Ω typ (100 Ω max); ±2 mA continuous wiper current. |+| 7 | A2 | input | I2C slave address bit 2. Digital logic input; VIH ≥ 0.7 × VDD, VIL ≤ 0.3 × VDD. Combined with A1/A0 to select the 7-bit I2C address. |+| 8 | VSS | power_in | Negative power supply pin. Tie to GND for single-supply operation (2.7-5.5 V) or to a negative rail for dual-supply operation (−2.25 V to −2.75 V). |+| 9 | SDA | bidirectional | I2C serial data. Open-drain, requires external pull-up. VIH ≥ 0.7 × VDD, VIL ≤ 0.3 × VDD. |+| 10 | SCL | input | I2C serial clock input. VIH ≥ 0.7 × VDD, VIL ≤ 0.3 × VDD. |+| 11 | GND | power_in | Ground reference for the device. |+| 12 | A1 | input | I2C slave address bit 1. Digital logic input; VIH ≥ 0.7 × VDD, VIL ≤ 0.3 × VDD. |+| 13 | A0 | input | I2C slave address bit 0. Digital logic input; VIH ≥ 0.7 × VDD, VIL ≤ 0.3 × VDD. |+| 14 | VDD | power_in | Positive power supply pin. 2.7 V to 5.5 V single-supply (VSS = 0 V) or +2.25 V to +2.75 V dual-supply. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Data Acquisition |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `TPL0102-100PWR`+- `TPL0102-100PWRRUC`+- `TPL0102-100PWRRUCR`++## CAD (KiCad official)++- Symbol: `TPL0102-100PWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tpl0102-100.pdf) (48 pp, sha256 `9cb7bc24b20a2045`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tpl0102-100pwr-datasheet.pdf)
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