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Initial commit: component/tn1215-800b-tr

Ray ·cfd16b09f2 ·1d ago
2 files changed +170
README.mdadded+39
@@ -0,0 +1,39 @@+# TN1215-800B-TR++**STMicroelectronics** · Thyristors (SCR)/Modules · DPAK++TN1215-800B-TR from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | K | passive | Cathode of the SCR; the on-state RMS current of 12 A (Tc = 110 °C) flows out of this pin. |+| 2 | A | passive | Anode of the SCR, connected to the metal tab; repetitive peak off-state and reverse voltage VDRM/VRRM is 800 V for this order code. |+| 3 | G | input | Gate trigger input; IGT is 2 mA min to 15 mA max at VD = 12 V, VGT max 1.3 V, and maximum peak reverse gate voltage is 5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | DPAK |+| Category | Transistors/Thyristors |+| Pins | 3 |++## CAD (KiCad official)++- Symbol: `TN1215-800B-TR`+- Footprint: `Package_TO_SOT_SMD:TO-252-2`+- 3D model: DPAK (KiCad packages3D, STEP)+- 3D model files: `tn1215-800b-tr-etched.step` / `tn1215-800b-tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tn1215-800b-tr.step` / `tn1215-800b-tr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603384487518613504) (17 pp, sha256 `de2df9b9d5beb4a3`, retrieved 2026-10-06, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tn1215-800b-tr-datasheet.pdf)
page.jsonadded+131
@@ -0,0 +1,131 @@+{+  "slug": "tn1215-800b-tr",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Thyristors (SCR)/Modules, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "transistors-thyristors",+    "tn1215-800b-tr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tn1215-800b-tr.kicad_sym",+    "tn1215-800b-tr.kicad_mod",+    "tn1215-800b-tr.glb",+    "tn1215-800b-tr.step",+    "tn1215-800b-tr.lbr",+    "docs/hero.png",+    "docs/tn1215-800b-tr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tn1215-800b-tr-hero.glb",+    "tn1215-800b-tr-hero.overlay.json"+  ],+  "component": {+    "mpn": "TN1215-800B-TR",+    "manufacturer": "STMicroelectronics",+    "package": "DPAK",+    "pin_count": 3,+    "category": "Transistors/Thyristors",+    "subcategory": "Thyristors (SCR)/Modules",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603384487518613504",+    "parts": {+      "symbol": "tn1215-800b-tr.kicad_sym",+      "footprint": "tn1215-800b-tr.kicad_mod",+      "model_3d": "tn1215-800b-tr-hero.glb",+      "model_3d_plain": "tn1215-800b-tr.glb",+      "model_3d_step": "tn1215-800b-tr-etched.step",+      "model_3d_step_plain": "tn1215-800b-tr.step",+      "lbr": "tn1215-800b-tr.lbr"+    },+    "distributor_links": {+      "lcsc": 2971427,+      "digikey": "497-TN1215-800B-TRCT-ND",+      "mouser": "511-TN1215-800B-TR"+    },+    "distributor_check": {+      "checked_at": "2026-10-06T04:27:49Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-TN1215-800B-TRCT-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "511-TN1215-800B-TR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "K",+        "type": "passive",+        "description": "Cathode of the SCR; the on-state RMS current of 12 A (Tc = 110 °C) flows out of this pin."+      },+      {+        "number": "2",+        "name": "A",+        "type": "passive",+        "description": "Anode of the SCR, connected to the metal tab; repetitive peak off-state and reverse voltage VDRM/VRRM is 800 V for this order code."+      },+      {+        "number": "3",+        "name": "G",+        "type": "input",+        "description": "Gate trigger input; IGT is 2 mA min to 15 mA max at VD = 12 V, VGT max 1.3 V, and maximum peak reverse gate voltage is 5 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-sonnet-5-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The datasheet shows the DPAK leads labelled K, A, G from left to right and labels the tab A. It does; Anode and cathode are given the passive type because the datasheet gives no electrical pin class for",+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 17,+        "cost_usd": 0.1979,+        "at": "2026-10-06T04:27:35"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603384487518613504",+        "pages": 17,+        "sha256": "de2df9b9d5beb4a3",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 3,+        "described": 3,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file