component
TMS320F28035PNTR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.md+14@@ -116,6 +116,20 @@ TMS320F28035PNTR from Texas Instruments, in a LQFP-80(12x12). Pinout and pin des - Footprint: `Package_QFP:LQFP-80_12x12mm_P0.5mm` - 3D model: LQFP-80(12x12) (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`tms320f28035pntr.step`](tms320f28035pntr.step) | 1051 KB | You want the bare part, or you mark your own boards. |+| [`tms320f28035pntr-etched.step`](tms320f28035pntr-etched.step) | 7.2 MB | You want the part with `TMS320F28035PNTR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 1771 faces against 1235 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1@@ -1,6 +1,6 @@ { "slug": "tms320f28035pntr",- "version": "0.1.0",+ "version": "0.2.0", "type": "component", "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "tags": [
page.json+12−12@@ -4,7 +4,7 @@ "slug": "tms320f28035pntr", "title": "TMS320F28035PNTR", "brief": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Datasheet-verified pinout, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.2.0", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -71,7 +71,7 @@ "number": "7", "name": "VDD", "type": "power_in",- "description": "CPU and logic digital 1.8 V supply. Place a 1.2 \u00b5F (or larger) decoupling capacitor between each VDD pin and ground when using the internal VREG."+ "description": "CPU and logic digital 1.8 V supply. Place a 1.2 µF (or larger) decoupling capacitor between each VDD pin and ground when using the internal VREG." }, { "number": "8",@@ -83,13 +83,13 @@ "number": "9", "name": "XRS", "type": "bidirectional",- "description": "Device reset input and watchdog reset output. Open-drain with internal pull-up; connect a 2.2 k\u03a9-10 k\u03a9 pull-up to VDDIO. Optional 100 nF or smaller noise-filter cap to VSS."+ "description": "Device reset input and watchdog reset output. Open-drain with internal pull-up; connect a 2.2 kΩ-10 kΩ pull-up to VDDIO. Optional 100 nF or smaller noise-filter cap to VSS." }, { "number": "10", "name": "TRST", "type": "input",- "description": "JTAG test reset with internal pull-down. Must be held low during normal device operation; requires external pull-up (typically 2.2 k\u03a9) to activate JTAG. Active-high test pin."+ "description": "JTAG test reset with internal pull-down. Must be held low during normal device operation; requires external pull-up (typically 2.2 kΩ) to activate JTAG. Active-high test pin." }, { "number": "11",@@ -149,7 +149,7 @@ "number": "20", "name": "VDDA", "type": "power_in",- "description": "Analog 3.3 V supply. Place a ~2.2 \u00b5F decoupling capacitor near this pin."+ "description": "Analog 3.3 V supply. Place a ~2.2 µF decoupling capacitor near this pin." }, { "number": "21",@@ -275,7 +275,7 @@ "number": "41", "name": "GPIO18/SPICLKA/LINTXA/XCLKOUT", "type": "bidirectional",- "description": "GPIO18. Alt: SPI-A clock (SPICLKA, I/O), LIN transmit A (LINTXA, O), external clock output (XCLKOUT, O/Z) sourced from SYSCLKOUT with 1x/\u00bd/\u00bc divider."+ "description": "GPIO18. Alt: SPI-A clock (SPICLKA, I/O), LIN transmit A (LINTXA, O), external clock output (XCLKOUT, O/Z) sourced from SYSCLKOUT with 1x/½/¼ divider." }, { "number": "42",@@ -353,7 +353,7 @@ "number": "54", "name": "VDD", "type": "power_in",- "description": "CPU and logic digital 1.8 V supply. 1.2 \u00b5F (or larger) decoupling per pin when using internal VREG."+ "description": "CPU and logic digital 1.8 V supply. 1.2 µF (or larger) decoupling per pin when using internal VREG." }, { "number": "55",@@ -461,7 +461,7 @@ "number": "72", "name": "VDD", "type": "power_in",- "description": "CPU and logic digital 1.8 V supply. 1.2 \u00b5F (or larger) decoupling per pin when using internal VREG."+ "description": "CPU and logic digital 1.8 V supply. 1.2 µF (or larger) decoupling per pin when using internal VREG." }, { "number": "73",@@ -583,9 +583,9 @@ "docs/hero.png", "docs/tms320f28035pntr-datasheet.pdf", "viewers/symbol.html",- "viewers/footprint.html"+ "viewers/footprint.html",+ "pads.json" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-80(12x12). Datasheet-verified pinout, KiCad symbol/footprint/3D." }