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Set visibility: public

Ray ·bdfe8903a9 ·6d ago ·parent ae77ed5
1 file changed +9−6
page.json+9−6
@@ -58,13 +58,13 @@         "number": "2",         "name": "TRST",         "type": "input",-        "description": "JTAG test reset input with an internal pull-down; must be held low during normal device operation and requires an external pull-up resistor (typically 2.2k\u03a9) sized for the debug pod driver strength."+        "description": "JTAG test reset input with an internal pull-down; must be held low during normal device operation and requires an external pull-up resistor (typically 2.2kΩ) sized for the debug pod driver strength."       },       {         "number": "3",         "name": "XRS",         "type": "bidirectional",-        "description": "Open-drain device reset (input) and watchdog reset (output) with internal pull-up; driven low by POR/BOR or for 512 OSCCLK cycles during a watchdog reset, requiring an external 2.2k\u03a9-10k\u03a9 pull-up to VDDIO."+        "description": "Open-drain device reset (input) and watchdog reset (output) with internal pull-up; driven low by POR/BOR or for 512 OSCCLK cycles during a watchdog reset, requiring an external 2.2kΩ-10kΩ pull-up to VDDIO."       },       {         "number": "4",@@ -112,7 +112,7 @@         "number": "11",         "name": "VDDA",         "type": "power_in",-        "description": "Analog power-supply pin; a 2.2\u00b5F decoupling capacitor (typical) should be placed near this pin."+        "description": "Analog power-supply pin; a 2.2µF decoupling capacitor (typical) should be placed near this pin."       },       {         "number": "12",@@ -238,7 +238,7 @@         "number": "32",         "name": "VDD",         "type": "power_in",-        "description": "CPU and digital logic power-supply pin; when the internal VREG is used, place a 1.2\u00b5F capacitor between each VDD pin and ground (a larger value may also be used)."+        "description": "CPU and digital logic power-supply pin; when the internal VREG is used, place a 1.2µF capacitor between each VDD pin and ground (a larger value may also be used)."       },       {         "number": "33",@@ -304,7 +304,7 @@         "number": "43",         "name": "VDD",         "type": "power_in",-        "description": "CPU and digital logic power-supply pin; when the internal VREG is used, place a 1.2\u00b5F capacitor between each VDD pin and ground (a larger value may also be used)."+        "description": "CPU and digital logic power-supply pin; when the internal VREG is used, place a 1.2µF capacitor between each VDD pin and ground (a larger value may also be used)."       },       {         "number": "44",@@ -399,5 +399,8 @@     "docs/tms320f28027fptt-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file