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Set visibility: public

Ray ·e78dc53647 ·4d ago ·parent 4db3274
1 file changed +9−6
page.json+9−6
@@ -58,13 +58,13 @@         "number": "2",         "name": "TRST",         "type": "input",-        "description": "JTAG test reset with internal pulldown; active-high, must be held low during normal operation, external pullup required (2.2k\u03a9 typically adequate)."+        "description": "JTAG test reset with internal pulldown; active-high, must be held low during normal operation, external pullup required (2.2kΩ typically adequate)."       },       {         "number": "3",         "name": "XRS",         "type": "bidirectional",-        "description": "Device reset input and watchdog reset output (open-drain with internal pullup); place a 2.2k\u03a9 to 10k\u03a9 resistor to VDDIO, and any filter capacitor to VSS must be 100nF or less."+        "description": "Device reset input and watchdog reset output (open-drain with internal pullup); place a 2.2kΩ to 10kΩ resistor to VDDIO, and any filter capacitor to VSS must be 100nF or less."       },       {         "number": "4",@@ -112,7 +112,7 @@         "number": "11",         "name": "VDDA",         "type": "power_in",-        "description": "Analog supply pin (2.97V to 3.63V recommended); connect a typical 2.2\u00b5F capacitor near this pin."+        "description": "Analog supply pin (2.97V to 3.63V recommended); connect a typical 2.2µF capacitor near this pin."       },       {         "number": "12",@@ -238,7 +238,7 @@         "number": "32",         "name": "VDD",         "type": "power_in",-        "description": "CPU and logic digital supply; with internal VREG place a 1.2\u00b5F capacitor between each VDD pin and ground (1.71V to 1.995V when externally supplied)."+        "description": "CPU and logic digital supply; with internal VREG place a 1.2µF capacitor between each VDD pin and ground (1.71V to 1.995V when externally supplied)."       },       {         "number": "33",@@ -304,7 +304,7 @@         "number": "43",         "name": "VDD",         "type": "power_in",-        "description": "CPU and logic digital supply; with internal VREG place a 1.2\u00b5F capacitor between each VDD pin and ground."+        "description": "CPU and logic digital supply; with internal VREG place a 1.2µF capacitor between each VDD pin and ground."       },       {         "number": "44",@@ -412,5 +412,8 @@     "docs/tms320f28027fptq-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file