component
TMS320F28027FPTQ
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Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+85@@ -0,0 +1,85 @@+# TMS320F28027FPTQ++**Texas Instruments** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++TMS320F28027FPTQ from Texas Instruments, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | GPIO29 | bidirectional | GPIO29 (I/O/Z), alternate functions SCITXDA, SCLA (I2C clock, open-drain) and TZ3 trip-zone input; internal pullup can be enabled/disabled. |+| 2 | TRST | input | JTAG test reset with internal pulldown; active-high, must be held low during normal operation, external pullup required (2.2kΩ typically adequate). |+| 3 | XRS | bidirectional | Device reset input and watchdog reset output (open-drain with internal pullup); place a 2.2kΩ to 10kΩ resistor to VDDIO, and any filter capacitor to VSS must be 100nF or less. |+| 4 | ADCINA6/AIO6 | bidirectional | ADC group A channel 6 input, shared with digital AIO6 (no internal pullup). |+| 5 | ADCINA4/COMP2A/AIO4 | bidirectional | ADC group A channel 4 input, comparator 2A input (48-pin device only) and digital AIO4. |+| 6 | ADCINA7 | input | ADC group A channel 7 input. |+| 7 | ADCINA3 | input | ADC group A channel 3 input. |+| 8 | ADCINA1 | input | ADC group A channel 1 input. |+| 9 | ADCINA2/COMP1A/AIO2 | bidirectional | ADC group A channel 2 input, comparator 1A input and digital AIO2. |+| 10 | ADCINA0/VREFHI | input | ADC group A channel 0 input; also external ADC reference high (VREFHI), used only in external reference mode and not to exceed VDDA. |+| 11 | VDDA | power_in | Analog supply pin (2.97V to 3.63V recommended); connect a typical 2.2µF capacitor near this pin. |+| 12 | VSSA/VREFLO | power_in | Analog ground; also ADC external reference low (VREFLO), always tied to ground. |+| 13 | ADCINB1 | input | ADC group B channel 1 input. |+| 14 | ADCINB2/COMP1B/AIO10 | bidirectional | ADC group B channel 2 input, comparator 1B input and digital AIO10. |+| 15 | ADCINB3 | input | ADC group B channel 3 input. |+| 16 | ADCINB4/COMP2B/AIO12 | bidirectional | ADC group B channel 4 input, comparator 2B input (48-pin device only) and digital AIO12. |+| 17 | ADCINB6/AIO14 | bidirectional | ADC group B channel 6 input shared with digital AIO14. |+| 18 | ADCINB7 | input | ADC group B channel 7 input. |+| 19 | GPIO34/COMP2OUT | bidirectional | GPIO34 (I/O/Z) with comparator 2 direct output; also boot-mode select input, may glitch during power-up with on-chip VREG. |+| 20 | GPIO35/TDI | bidirectional | GPIO35 (I/O/Z) or JTAG TDI input with internal pullup, sampled on rising edge of TCK. |+| 21 | GPIO36/TMS | bidirectional | GPIO36 (I/O/Z) or JTAG TMS input with internal pullup, clocked into the TAP controller on rising edge of TCK. |+| 22 | GPIO37/TDO | bidirectional | GPIO37 (I/O/Z) or JTAG TDO output (8mA drive), shifted out on falling edge of TCK; also used for boot-mode selection. |+| 23 | GPIO38/XCLKIN/TCK | bidirectional | GPIO38 (I/O/Z), JTAG TCK input with internal pullup, or external oscillator input XCLKIN (default XCLKIN source). |+| 24 | GPIO18/SPICLKA/SCITXDA/XCLKOUT | bidirectional | GPIO18 (I/O/Z) with SPI-A clock, SCI-A transmit or XCLKOUT output derived from SYSCLKOUT (SYSCLKOUT/4 at reset). |+| 25 | GPIO19/XCLKIN/SPISTEA/SCIRXDA/ECAP1 | bidirectional | GPIO19 (I/O/Z) with XCLKIN external oscillator input, SPI-A transmit enable, SCI-A receive and eCAP1. |+| 26 | GPIO17/SPISOMIA/TZ3 | bidirectional | GPIO17 (I/O/Z) with SPI-A slave out/master in and TZ3 trip-zone input. |+| 27 | GPIO16/SPISIMOA/TZ2 | bidirectional | GPIO16 (I/O/Z) with SPI-A slave in/master out and TZ2 trip-zone input. |+| 28 | GPIO1/EPWM1B/COMP1OUT | bidirectional | GPIO1 (I/O/Z) with ePWM1 output B and comparator 1 direct output. |+| 29 | GPIO0/EPWM1A | bidirectional | GPIO0 (I/O/Z) with ePWM1 output A and HRPWM channel. |+| 30 | TEST | unconnected | Test pin reserved for TI; must be left unconnected. |+| 31 | GPIO32/SDAA/EPWMSYNCI/ADCSOCAO | bidirectional | GPIO32 (I/O/Z) with I2C data (open-drain), ePWM external sync input and ADC start-of-conversion A output. |+| 32 | VDD | power_in | CPU and logic digital supply; with internal VREG place a 1.2µF capacitor between each VDD pin and ground (1.71V to 1.995V when externally supplied). |+| 33 | VSS | power_in | Digital ground. |+| 34 | VREGENZ | input | Internal VREG enable with internal pulldown; tie to VSS to enable the internal 1.8V VREG, or to VDDIO to disable it and use an external 1.8V supply. |+| 35 | VDDIO | power_in | Digital I/O buffer and flash supply (2.97V to 3.63V recommended); place a decoupling capacitor on this pin. |+| 36 | GPIO33/SCLA/EPWMSYNCO/ADCSOCBO | bidirectional | GPIO33 (I/O/Z) with I2C clock (open-drain), ePWM external sync output and ADC start-of-conversion B output. |+| 37 | GPIO2/EPWM2A | bidirectional | GPIO2 (I/O/Z) with ePWM2 output A and HRPWM channel. |+| 38 | GPIO3/EPWM2B/COMP2OUT | bidirectional | GPIO3 (I/O/Z) with ePWM2 output B and comparator 2 direct output (48-pin device only). |+| 39 | GPIO4/EPWM3A | bidirectional | GPIO4 (I/O/Z) with ePWM3 output A and HRPWM channel. |+| 40 | GPIO5/EPWM3B/ECAP1 | bidirectional | GPIO5 (I/O/Z) with ePWM3 output B and eCAP1 input/output. |+| 41 | GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO | bidirectional | GPIO6 (I/O/Z) with ePWM4 output A, external ePWM sync input and sync output. |+| 42 | GPIO7/EPWM4B/SCIRXDA | bidirectional | GPIO7 (I/O/Z) with ePWM4 output B and SCI-A receive data. |+| 43 | VDD | power_in | CPU and logic digital supply; with internal VREG place a 1.2µF capacitor between each VDD pin and ground. |+| 44 | VSS | power_in | Digital ground. |+| 45 | X1 | input | 1.8V on-chip crystal oscillator input; connect crystal/resonator between X1 and X2, never apply 3.3V levels, connect to GND if unused. |+| 46 | X2 | output | On-chip crystal oscillator output; crystal/resonator connects between X1 and X2, leave unconnected if unused. |+| 47 | GPIO12/TZ1/SCITXDA | bidirectional | GPIO12 (I/O/Z) with TZ1 trip-zone input and SCI-A transmit data. |+| 48 | GPIO28/SCIRXDA/SDAA/TZ2 | bidirectional | GPIO28 (I/O/Z) with SCI receive data, I2C data (open-drain) and TZ2 trip-zone input. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | LQFP-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `TMS320F28027FPTQ`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `tms320f28027fptq-etched.step` / `tms320f28027fptq-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tms320f28027fptq.step` / `tms320f28027fptq.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tms320f28020) (147 pp, sha256 `b90c388f4142c4b5`, retrieved 2026-10-01, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tms320f28027fptq-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "tms320f28027fptq",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tms320f28027fptq.kicad_sym",+ "tms320f28027fptq.kicad_mod",+ "tms320f28027fptq.glb",+ "tms320f28027fptq.step",+ "tms320f28027fptq.lbr",+ "docs/hero.png",+ "docs/tms320f28027fptq-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "TMS320F28027FPTQ",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-48(7x7)",+ "pin_count": 48,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tms320f28020",+ "parts": {+ "symbol": "tms320f28027fptq.kicad_sym",+ "footprint": "tms320f28027fptq.kicad_mod",+ "model_3d": "tms320f28027fptq-etched.glb",+ "model_3d_plain": "tms320f28027fptq.glb",+ "model_3d_step": "tms320f28027fptq-etched.step",+ "model_3d_step_plain": "tms320f28027fptq.step",+ "lbr": "tms320f28027fptq.lbr"+ },+ "distributor_links": {+ "lcsc": "C504368",+ "digikey": "296-36410-ND",+ "mouser": "595-TMS320F28027FPTQ"+ },+ "distributor_check": {+ "checked_at": "2026-10-01T09:20:13Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-36410-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TMS320F28027FPTQ",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "GPIO29",+ "type": "bidirectional",+ "description": "GPIO29 (I/O/Z), alternate functions SCITXDA, SCLA (I2C clock, open-drain) and TZ3 trip-zone input; internal pullup can be enabled/disabled."+ },+ {+ "number": "2",+ "name": "TRST",+ "type": "input",+ "description": "JTAG test reset with internal pulldown; active-high, must be held low during normal operation, external pullup required (2.2kΩ typically adequate)."+ },+ {+ "number": "3",+ "name": "XRS",+ "type": "bidirectional",+ "description": "Device reset input and watchdog reset output (open-drain with internal pullup); place a 2.2kΩ to 10kΩ resistor to VDDIO, and any filter capacitor to VSS must be 100nF or less."+ },+ {+ "number": "4",+ "name": "ADCINA6/AIO6",+ "type": "bidirectional",+ "description": "ADC group A channel 6 input, shared with digital AIO6 (no internal pullup)."+ },+ {+ "number": "5",+ "name": "ADCINA4/COMP2A/AIO4",+ "type": "bidirectional",+ "description": "ADC group A channel 4 input, comparator 2A input (48-pin device only) and digital AIO4."+ },+ {+ "number": "6",+ "name": "ADCINA7",+ "type": "input",+ "description": "ADC group A channel 7 input."+ },+ {+ "number": "7",+ "name": "ADCINA3",+ "type": "input",+ "description": "ADC group A channel 3 input."+ },+ {+ "number": "8",+ "name": "ADCINA1",+ "type": "input",+ "description": "ADC group A channel 1 input."+ },+ {+ "number": "9",+ "name": "ADCINA2/COMP1A/AIO2",+ "type": "bidirectional",+ "description": "ADC group A channel 2 input, comparator 1A input and digital AIO2."+ },+ {+ "number": "10",+ "name": "ADCINA0/VREFHI",+ "type": "input",+ "description": "ADC group A channel 0 input; also external ADC reference high (VREFHI), used only in external reference mode and not to exceed VDDA."+ },+ {+ "number": "11",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply pin (2.97V to 3.63V recommended); connect a typical 2.2µF capacitor near this pin."+ },+ {+ "number": "12",+ "name": "VSSA/VREFLO",+ "type": "power_in",+ "description": "Analog ground; also ADC external reference low (VREFLO), always tied to ground."+ },+ {+ "number": "13",+ "name": "ADCINB1",+ "type": "input",+ "description": "ADC group B channel 1 input."+ },+ {+ "number": "14",+ "name": "ADCINB2/COMP1B/AIO10",+ "type": "bidirectional",+ "description": "ADC group B channel 2 input, comparator 1B input and digital AIO10."+ },+ {+ "number": "15",+ "name": "ADCINB3",+ "type": "input",+ "description": "ADC group B channel 3 input."+ },+ {+ "number": "16",+ "name": "ADCINB4/COMP2B/AIO12",+ "type": "bidirectional",+ "description": "ADC group B channel 4 input, comparator 2B input (48-pin device only) and digital AIO12."+ },+ {+ "number": "17",+ "name": "ADCINB6/AIO14",+ "type": "bidirectional",+ "description": "ADC group B channel 6 input shared with digital AIO14."+ },+ {+ "number": "18",+ "name": "ADCINB7",+ "type": "input",+ "description": "ADC group B channel 7 input."+ },+ {+ "number": "19",+ "name": "GPIO34/COMP2OUT",+ "type": "bidirectional",+ "description": "GPIO34 (I/O/Z) with comparator 2 direct output; also boot-mode select input, may glitch during power-up with on-chip VREG."+ },+ {+ "number": "20",+ "name": "GPIO35/TDI",+ "type": "bidirectional",+ "description": "GPIO35 (I/O/Z) or JTAG TDI input with internal pullup, sampled on rising edge of TCK."+ },+ {+ "number": "21",+ "name": "GPIO36/TMS",+ "type": "bidirectional",+ "description": "GPIO36 (I/O/Z) or JTAG TMS input with internal pullup, clocked into the TAP controller on rising edge of TCK."+ },+ {+ "number": "22",+ "name": "GPIO37/TDO",+ "type": "bidirectional",+ "description": "GPIO37 (I/O/Z) or JTAG TDO output (8mA drive), shifted out on falling edge of TCK; also used for boot-mode selection."+ },+ {+ "number": "23",+ "name": "GPIO38/XCLKIN/TCK",+ "type": "bidirectional",+ "description": "GPIO38 (I/O/Z), JTAG TCK input with internal pullup, or external oscillator input XCLKIN (default XCLKIN source)."+ },+ {+ "number": "24",+ "name": "GPIO18/SPICLKA/SCITXDA/XCLKOUT",+ "type": "bidirectional",+ "description": "GPIO18 (I/O/Z) with SPI-A clock, SCI-A transmit or XCLKOUT output derived from SYSCLKOUT (SYSCLKOUT/4 at reset)."+ },+ {+ "number": "25",+ "name": "GPIO19/XCLKIN/SPISTEA/SCIRXDA/ECAP1",+ "type": "bidirectional",+ "description": "GPIO19 (I/O/Z) with XCLKIN external oscillator input, SPI-A transmit enable, SCI-A receive and eCAP1."+ },+ {+ "number": "26",+ "name": "GPIO17/SPISOMIA/TZ3",+ "type": "bidirectional",+ "description": "GPIO17 (I/O/Z) with SPI-A slave out/master in and TZ3 trip-zone input."+ },+ {+ "number": "27",+ "name": "GPIO16/SPISIMOA/TZ2",+ "type": "bidirectional",+ "description": "GPIO16 (I/O/Z) with SPI-A slave in/master out and TZ2 trip-zone input."+ },+ {+ "number": "28",+ "name": "GPIO1/EPWM1B/COMP1OUT",+ "type": "bidirectional",+ "description": "GPIO1 (I/O/Z) with ePWM1 output B and comparator 1 direct output."+ },+ {+ "number": "29",+ "name": "GPIO0/EPWM1A",+ "type": "bidirectional",+ "description": "GPIO0 (I/O/Z) with ePWM1 output A and HRPWM channel."+ },+ {+ "number": "30",+ "name": "TEST",+ "type": "unconnected",+ "description": "Test pin reserved for TI; must be left unconnected."+ },+ {+ "number": "31",+ "name": "GPIO32/SDAA/EPWMSYNCI/ADCSOCAO",+ "type": "bidirectional",+ "description": "GPIO32 (I/O/Z) with I2C data (open-drain), ePWM external sync input and ADC start-of-conversion A output."+ },+ {+ "number": "32",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital supply; with internal VREG place a 1.2µF capacitor between each VDD pin and ground (1.71V to 1.995V when externally supplied)."+ },+ {+ "number": "33",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "34",+ "name": "VREGENZ",+ "type": "input",+ "description": "Internal VREG enable with internal pulldown; tie to VSS to enable the internal 1.8V VREG, or to VDDIO to disable it and use an external 1.8V supply."+ },+ {+ "number": "35",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O buffer and flash supply (2.97V to 3.63V recommended); place a decoupling capacitor on this pin."+ },+ {+ "number": "36",+ "name": "GPIO33/SCLA/EPWMSYNCO/ADCSOCBO",+ "type": "bidirectional",+ "description": "GPIO33 (I/O/Z) with I2C clock (open-drain), ePWM external sync output and ADC start-of-conversion B output."+ },+ {+ "number": "37",+ "name": "GPIO2/EPWM2A",+ "type": "bidirectional",+ "description": "GPIO2 (I/O/Z) with ePWM2 output A and HRPWM channel."+ },+ {+ "number": "38",+ "name": "GPIO3/EPWM2B/COMP2OUT",+ "type": "bidirectional",+ "description": "GPIO3 (I/O/Z) with ePWM2 output B and comparator 2 direct output (48-pin device only)."+ },+ {+ "number": "39",+ "name": "GPIO4/EPWM3A",+ "type": "bidirectional",+ "description": "GPIO4 (I/O/Z) with ePWM3 output A and HRPWM channel."+ },+ {+ "number": "40",+ "name": "GPIO5/EPWM3B/ECAP1",+ "type": "bidirectional",+ "description": "GPIO5 (I/O/Z) with ePWM3 output B and eCAP1 input/output."+ },+ {+ "number": "41",+ "name": "GPIO6/EPWM4A/EPWMSYNCI/EPWMSYNCO",+ "type": "bidirectional",+ "description": "GPIO6 (I/O/Z) with ePWM4 output A, external ePWM sync input and sync output."+ },+ {+ "number": "42",+ "name": "GPIO7/EPWM4B/SCIRXDA",+ "type": "bidirectional",+ "description": "GPIO7 (I/O/Z) with ePWM4 output B and SCI-A receive data."+ },+ {+ "number": "43",+ "name": "VDD",+ "type": "power_in",+ "description": "CPU and logic digital supply; with internal VREG place a 1.2µF capacitor between each VDD pin and ground."+ },+ {+ "number": "44",+ "name": "VSS",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "45",+ "name": "X1",+ "type": "input",+ "description": "1.8V on-chip crystal oscillator input; connect crystal/resonator between X1 and X2, never apply 3.3V levels, connect to GND if unused."+ },+ {+ "number": "46",+ "name": "X2",+ "type": "output",+ "description": "On-chip crystal oscillator output; crystal/resonator connects between X1 and X2, leave unconnected if unused."+ },+ {+ "number": "47",+ "name": "GPIO12/TZ1/SCITXDA",+ "type": "bidirectional",+ "description": "GPIO12 (I/O/Z) with TZ1 trip-zone input and SCI-A transmit data."+ },+ {+ "number": "48",+ "name": "GPIO28/SCIRXDA/SDAA/TZ2",+ "type": "bidirectional",+ "description": "GPIO28 (I/O/Z) with SCI receive data, I2C data (open-drain) and TZ2 trip-zone input."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 85,+ "cost_usd": 0.7645,+ "at": "2026-10-01T09:19:51"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tms320f28020",+ "pages": 147,+ "sha256": "b90c388f4142c4b5",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}