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Initial commit: component/tlv9162qdgkrq1

Ray ·aaef21e5f2 ·21d ago
2 files changed +244
README.mdadded+44
@@ -0,0 +1,44 @@+# TLV9162QDGKRQ1++**Texas Instruments** · Operational Amplifier · VSSOP-8++TLV9162QDGKRQ1 from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT1 | output | Output of channel 1 amplifier. |+| 2 | IN1- | input | Inverting input of channel 1. |+| 3 | IN1+ | input | Noninverting input of channel 1. |+| 4 | V- | power_in | Negative (lowest) power supply pin. |+| 5 | IN2+ | input | Noninverting input of channel 2. |+| 6 | IN2- | input | Inverting input of channel 2. |+| 7 | OUT2 | output | Output of channel 2 amplifier. |+| 8 | V+ | power_in | Positive (highest) power supply pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-8 |+| Category | Amplifiers/Comparators |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TLV9162QDGKRQ1`+- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`+- 3D model: VSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `tlv9162qdgkrq1-etched.step` / `tlv9162qdgkrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv9162qdgkrq1.step` / `tlv9162qdgkrq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604371371493371904) (51 pp, sha256 `2accdd1f2aa6b7e9`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv9162qdgkrq1-datasheet.pdf)
page.jsonadded+200
@@ -0,0 +1,200 @@+{+  "slug": "tlv9162qdgkrq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Operational Amplifier, VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "amplifiers-comparators",+    "tlv9162qdgkrq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tlv9162qdgkrq1.kicad_sym",+    "tlv9162qdgkrq1.kicad_mod",+    "tlv9162qdgkrq1.glb",+    "tlv9162qdgkrq1.step",+    "tlv9162qdgkrq1.lbr",+    "docs/hero.png",+    "docs/tlv9162qdgkrq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tlv9162qdgkrq1-hero.glb",+    "tlv9162qdgkrq1-hero.overlay.json"+  ],+  "component": {+    "mpn": "TLV9162QDGKRQ1",+    "manufacturer": "Texas Instruments",+    "package": "VSSOP-8",+    "pin_count": 8,+    "category": "Amplifiers/Comparators",+    "subcategory": "Operational Amplifier",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604371371493371904",+    "parts": {+      "symbol": "tlv9162qdgkrq1.kicad_sym",+      "footprint": "tlv9162qdgkrq1.kicad_mod",+      "model_3d": "tlv9162qdgkrq1-hero.glb",+      "model_3d_plain": "tlv9162qdgkrq1.glb",+      "model_3d_step": "tlv9162qdgkrq1-etched.step",+      "model_3d_step_plain": "tlv9162qdgkrq1.step",+      "lbr": "tlv9162qdgkrq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C20345947",+      "digikey": "296-TLV9162QDGKRQ1TR-ND",+      "mouser": "595-TLV9162QDGKRQ1"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T02:20:22Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-TLV9162QDGKRQ1TR-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TLV9162QDGKRQ1",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "OUT1",+        "type": "output",+        "description": "Output of channel 1 amplifier."+      },+      {+        "number": "2",+        "name": "IN1–",+        "type": "input",+        "description": "Inverting input of channel 1."+      },+      {+        "number": "3",+        "name": "IN1+",+        "type": "input",+        "description": "Noninverting input of channel 1."+      },+      {+        "number": "4",+        "name": "V-",+        "type": "power_in",+        "description": "Negative (lowest) power supply pin."+      },+      {+        "number": "5",+        "name": "IN2+",+        "type": "input",+        "description": "Noninverting input of channel 2."+      },+      {+        "number": "6",+        "name": "IN2–",+        "type": "input",+        "description": "Inverting input of channel 2."+      },+      {+        "number": "7",+        "name": "OUT2",+        "type": "output",+        "description": "Output of channel 2 amplifier."+      },+      {+        "number": "8",+        "name": "V+",+        "type": "power_in",+        "description": "Positive (highest) power supply pin."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The pinout comes from Figure 5-3 and Table 5-2 (TLV9162-Q1, D and DGK packages, 8-pin SOIC and VSSOP; The datasheet gives only functional descriptions for these pins (for example 'Noninverting input, ch; Pin types for V+ and V- are typed power_in per the KiCad convention for supply pins; the datasheet m"+        ],+        "pages_sent": 12,+        "cost_usd": 0.0581,+        "at": "2026-10-08T02:20:06"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604371371493371904",+        "pages": 51,+        "sha256": "2accdd1f2aa6b7e9",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tlv9162qdgkrq1.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          3.1,+          2,+          0.85+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "353552981eef35cb93635057d4aeb89aef22648c77af6fd095e328bfe6b834bd",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tlv9162qdgkrq1-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          3.1,+          2,+          0.85+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "085cf4331cf1129d75dd21b946589014e867fb6ff30f275bf94fca450ea7f751",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file