component
TLV9102IPWR
Public Made by Adomby adom
Texas Instruments Operational Amplifier, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# TLV9102IPWR++**Texas Instruments** · Operational Amplifier · TSSOP-8++TLV9102IPWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | OUT1 | output | Output of channel 1; rail-to-rail swing from V- to V+ with typical 45mV to 60mV margin at VS=16V and RL=10kΩ. |+| 2 | IN1- | input | Inverting input of channel 1; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input current limited to ±10mA. |+| 3 | IN1+ | input | Non-inverting input of channel 1; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input bias current ±10pA typical. |+| 4 | V- | power_in | Negative (lowest) power supply rail; supply voltage VS = (V+)-(V-) from 2.7V to 16V. |+| 5 | IN2+ | input | Non-inverting input of channel 2; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input bias current ±10pA typical. |+| 6 | IN2- | input | Inverting input of channel 2; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input current limited to ±10mA. |+| 7 | OUT2 | output | Output of channel 2; rail-to-rail swing from V- to V+ with typical 45mV to 60mV margin at VS=16V and RL=10kΩ. |+| 8 | V+ | power_in | Positive (highest) power supply rail; supply voltage VS = (V+)-(V-) from 2.7V to 16V; bypass with 0.1µF capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-8 |+| Category | Amplifiers/Comparators |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TLV9102IPWR`+- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`+- 3D model: TSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `tlv9102ipwr-etched.step` / `tlv9102ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv9102ipwr.step` / `tlv9102ipwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv9102) (95 pp, sha256 `8d014669156efae4`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv9102ipwr-datasheet.pdf)
page.jsonadded+157@@ -0,0 +1,157 @@+{+ "slug": "tlv9102ipwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Operational Amplifier, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "amplifiers-comparators",+ "tlv9102ipwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tlv9102ipwr.kicad_sym",+ "tlv9102ipwr.kicad_mod",+ "tlv9102ipwr.glb",+ "tlv9102ipwr.step",+ "tlv9102ipwr.lbr",+ "docs/hero.png",+ "docs/tlv9102ipwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tlv9102ipwr-hero.glb",+ "tlv9102ipwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TLV9102IPWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-8",+ "pin_count": 8,+ "category": "Amplifiers/Comparators",+ "subcategory": "Operational Amplifier",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tlv9102",+ "parts": {+ "symbol": "tlv9102ipwr.kicad_sym",+ "footprint": "tlv9102ipwr.kicad_mod",+ "model_3d": "tlv9102ipwr-hero.glb",+ "model_3d_plain": "tlv9102ipwr.glb",+ "model_3d_step": "tlv9102ipwr-etched.step",+ "model_3d_step_plain": "tlv9102ipwr.step",+ "lbr": "tlv9102ipwr.lbr"+ },+ "distributor_links": {+ "lcsc": 2058017,+ "digikey": "296-TLV9102IPWRTR-ND",+ "mouser": "595-TLV9102IPWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T03:12:36Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TLV9102IPWRTR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-TLV9102IPWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "OUT1",+ "type": "output",+ "description": "Output of channel 1; rail-to-rail swing from V- to V+ with typical 45mV to 60mV margin at VS=16V and RL=10kΩ."+ },+ {+ "number": "2",+ "name": "IN1–",+ "type": "input",+ "description": "Inverting input of channel 1; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input current limited to ±10mA."+ },+ {+ "number": "3",+ "name": "IN1+",+ "type": "input",+ "description": "Non-inverting input of channel 1; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input bias current ±10pA typical."+ },+ {+ "number": "4",+ "name": "V–",+ "type": "power_in",+ "description": "Negative (lowest) power supply rail; supply voltage VS = (V+)-(V-) from 2.7V to 16V."+ },+ {+ "number": "5",+ "name": "IN2+",+ "type": "input",+ "description": "Non-inverting input of channel 2; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input bias current ±10pA typical."+ },+ {+ "number": "6",+ "name": "IN2–",+ "type": "input",+ "description": "Inverting input of channel 2; common mode input voltage range (V-)-0.2V to (V+)+0.2V; input current limited to ±10mA."+ },+ {+ "number": "7",+ "name": "OUT2",+ "type": "output",+ "description": "Output of channel 2; rail-to-rail swing from V- to V+ with typical 45mV to 60mV margin at VS=16V and RL=10kΩ."+ },+ {+ "number": "8",+ "name": "V+",+ "type": "power_in",+ "description": "Positive (highest) power supply rail; supply voltage VS = (V+)-(V-) from 2.7V to 16V; bypass with 0.1µF capacitor."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 28,+ "cost_usd": 0.1968,+ "at": "2026-10-03T03:12:12"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tlv9102",+ "pages": 95,+ "sha256": "8d014669156efae4",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}