component

TLV9020L1DCKR

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Texas Instruments Integrated Circuits (ICs), 6-TSSOP, SC-88, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentintegrated circuits (ics)tlv9020l1dckrfactory-2.0.0extractor-text

Verified TLV9020L1DCKR

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier mfr, 6 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TLV9020L1DCKR · 6-TSSOP, SC-88, SOT-363 · 6 pins
  • ✓copper: 6 copper pads, none touching another net
  • ✓datasheet: all 6 pin names found in the 40-page datasheet
  • •distributor (warn): no ['lcsc'] number
  • ✓family: Texas_Instruments_TLV9020
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-uuc_487x/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 6 pins = 6 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 6 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tlv9020l1dckr.kicad_sym✓ tlv9020l1dckr.kicad_mod✓ tlv9020l1dckr.step
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Publish 0.1.0

Ray ·c242c79086 ·
15 files changed +6722
README.md+86docs/hero.pngdocs/tlv9020l1dckr-datasheet.pdfpackage.json+181page.json+187tlv9020l1dckr-etched.glbtlv9020l1dckr-hero.glbtlv9020l1dckr-hero.overlay.json+221tlv9020l1dckr.glbtlv9020l1dckr.kicad_mod+28tlv9020l1dckr.kicad_sym+37tlv9020l1dckr.lbr+121tlv9020l1dckr.step+5859viewers/footprint.html+1viewers/symbol.html+1
README.mdadded+86
@@ -0,0 +1,86 @@+# TLV9020L1DCKR++**Texas Instruments** · Integrated Circuits (ICs) · 6-TSSOP, SC-88, SOT-363++TLV9020L1DCKR from Texas Instruments, in a 6-TSSOP, SC-88, SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN+ | input | Non-inverting (+) input of the comparator. |+| 2 | V- | power_in | Negative supply voltage pin. |+| 3 | IN- | input | Inverting (-) input of the comparator. |+| 4 | OUT | output | Comparator output; latches on the first threshold crossing until cleared by CLR. |+| 5 | CLR | input | Clear input; pulse high (> 1.2V) to clear the output latch. |+| 6 | V+ | power_in | Positive supply voltage pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | 6-TSSOP, SC-88, SOT-363 |+| Category | Integrated Circuits (ICs) |+| Pins | 6 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Input threshold voltage | VT | -1.75 | 0.3 | 1.75 | mV | VS = 1.8V and 5V | 7 |+| Input threshold voltage over temperature | VT | -2.25 |  | 2.25 | mV | VS = 1.8V and 5V, TA = -40°C to +125°C | 7 |+| Input threshold voltage drift | dVT/dT | -0.5 |  | 0.5 | µV/°C | VS = 1.8V and 5V, TA = -40°C to +125°C | 7 |+| Quiescent current per comparator | IQ |  | 22 | 30 | µA | VS = 1.8V and 5V, No Load, Output Low | 7 |+| Quiescent current per comparator over temperature | IQ |  |  | 42 | µA | VS = 1.8V and 5V, No Load, Output Low, TA = -40°C to +125°C | 7 |+| Power-supply rejection ratio (push-pull) | PSRR | 75 | 95 |  | dB | VS = 1.8V to 5V, TA = -40°C to +125°C (push-pull only) | 7 |+| Power-supply rejection ratio (open drain) | PSRR | 80 | 95 |  | dB | VS = 1.8V to 5V, TA = -40°C to +125°C (open drain only) | 7 |+| Common-mode rejection ratio (5V) | CMRR | 60 | 70 |  | dB | VS = 5V, (V-) - 0.2V < VCM < (V+) + 0.2V, TA = -40°C to +125°C | 7 |+| Common-mode rejection ratio (1.8V) | CMRR | 50 | 60 |  | dB | VS = 1.8V, (V-) - 0.2V < VCM < (V+) + 0.2V, TA = -40°C to +125°C | 7 |+| Common-mode voltage range | VCM-Range | -0.2 |  | 0.2 | V | VS = 1.8V and 5V, TA = -40°C to +125°C; min relative to (V-), max relative to (V+) | 7 |+| Voltage swing from (V-) | VOL |  | 75 | 125 | mV | ISINK = 4mA, TA = 25°C | 7 |+| Voltage swing from (V-) over temperature | VOL |  |  | 175 | mV | ISINK = 4mA, TA = -40°C to +125°C | 7 |+| Voltage swing from (V+) (push-pull) | VOH |  | 75 | 125 | mV | ISOURCE = 4mA, TA = 25°C (push-pull only) | 7 |+| Voltage swing from (V+) over temperature (push-pull) | VOH |  |  | 175 | mV | ISOURCE = 4mA, TA = -40°C to +125°C (push-pull only) | 7 |+| Short-circuit current sinking | ISC |  | 75 | 85 | mA | VS = 5V, Sinking | 7 |+| Short-circuit current sourcing (push-pull) | ISC |  | 75 | 85 | mA | VS = 5V, Sourcing (push-pull only) | 7 |+| Clear fall to latch reset propagation delay | TPD-CLR-F |  | 25 | 70 | ns | CLR = 1.8V to 5V, delay from CLR falling edge signal to unlatched output condition | 8 |+| Supply voltage | VS | 1.65 |  | 5.5 | V | VS = (V+) - (V-) | 5 |+| Input voltage range (IN+, IN-, CLR) |  | -0.2 |  | 5.5 | V | from (V-) | 5 |+| Input common mode voltage range (IN+, IN-) |  | -0.2 |  | 0.2 | V | min from (V-), max (V+) + 0.2 V | 5 |+| Output voltage range, open drain output |  | 0 |  | 5.5 | V | from (V-) | 5 |+| Ambient temperature | TA | -40 |  | 125 | °C |  | 5 |+| Supply voltage | VS | -0.3 |  | 6 | V | VS = (V+) - (V-) | 5 |+| Input pins voltage (IN+, IN-, CLR) |  | -0.3 |  | 6 | V | from (V-) | 5 |+| Current into input pins (IN+, IN-, CLR) |  | -10 |  | 10 | mA |  | 5 |+| Output (OUT) voltage |  | -0.3 |  | 6 | V | from (V-) | 5 |+| Output (OUT) open drain voltage |  | -0.3 |  |  | V | from (V-); upper limit is (V+) + 0.3 V as printed | 5 |+| Output short circuit duration |  |  |  | 10 | s | Short-circuit to (V-) or (V+) | 5 |+| Junction temperature | TJ |  |  | 150 | °C |  | 5 |+| Storage temperature | Tstg | -65 |  | 150 | °C |  | 5 |+| ESD human-body model | V(ESD) | -2000 |  | 2000 | V | HBM, per ANSI/ESDA/JEDEC JS-001 | 5 |+| ESD charged-device model | V(ESD) | -1000 |  | 1000 | V | CDM, per ANSI/ESDA/JEDEC JS-002 | 5 |+| Junction-to-ambient thermal resistance (DCK) | RqJA |  | 210.5 |  | °C/W | DCK (SC-70) package, single | 6 |+| Junction-to-case (top) thermal resistance (DCK) | RqJC(top) |  | 143.9 |  | °C/W | DCK (SC-70) package, single | 6 |+| Junction-to-board thermal resistance (DCK) | RqJB |  | 64.7 |  | °C/W | DCK (SC-70) package, single | 6 |+| Junction-to-top characterization parameter (DCK) | yJT |  | 46.1 |  | °C/W | DCK (SC-70) package, single | 6 |+| Junction-to-board characterization parameter (DCK) | yJB |  | 64.5 |  | °C/W | DCK (SC-70) package, single | 6 |++## CAD (KiCad official)++- Symbol: `TLV9020L1DCKR`+- Footprint: `Adom_Gen:Texas_Instruments_TLV9020`+- 3D model: 6-TSSOP, SC-88, SOT-363 (KiCad packages3D, STEP)+- 3D model files: `tlv9020l1dckr-etched.step` / `tlv9020l1dckr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv9020l1dckr.step` / `tlv9020l1dckr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tlv9020l.pdf) (40 pp, sha256 `a8706fdf8ff72411`, retrieved 2026-11-02, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv9020l1dckr-datasheet.pdf)
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package.jsonadded+181
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "integrated circuits (ics)",+    "tlv9020l1dckr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tlv9020l1dckr.kicad_sym",+    "tlv9020l1dckr.kicad_mod",+    "tlv9020l1dckr.glb",+    "tlv9020l1dckr.step",+    "tlv9020l1dckr.lbr",+    "docs/hero.png",+    "docs/tlv9020l1dckr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tlv9020l1dckr-hero.glb",+    "tlv9020l1dckr-hero.overlay.json",+    "tlv9020l1dckr-etched.glb"+  ],+  "component": {+    "mpn": "TLV9020L1DCKR",+    "manufacturer": "Texas Instruments",+    "package": "6-TSSOP, SC-88, SOT-363",+    "pin_count": 6,+    "category": "Integrated Circuits (ICs)",+    "subcategory": "Integrated Circuits (ICs)",+    "datasheet": "https://www.ti.com/lit/ds/symlink/tlv9020l.pdf",+    "parts": {+      "symbol": "tlv9020l1dckr.kicad_sym",+      "footprint": "tlv9020l1dckr.kicad_mod",+      "model_3d": "tlv9020l1dckr-hero.glb",+      "model_3d_plain": "tlv9020l1dckr-etched.glb",+      "model_3d_step": "tlv9020l1dckr-etched.step",+      "model_3d_step_plain": "tlv9020l1dckr.step",+      "lbr": "tlv9020l1dckr.lbr"+    },+    "distributor_links": {+      "digikey": "296-TLV9020L1DCKRTR-ND",+      "mouser": "595-TLV9020L1DCKR"+    },+    "distributor_check": {+      "checked_at": "2026-11-02T20:07:33Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-TLV9020L1DCKRTR-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-TLV9020L1DCKR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "IN+",+        "type": "input",+        "description": "Non-inverting (+) input of the comparator."+      },+      {+        "number": "2",+        "name": "V-",+        "type": "power_in",+        "description": "Negative supply voltage pin."+      },+      {+        "number": "3",+        "name": "IN-",+        "type": "input",+        "description": "Inverting (-) input of the comparator."+      },+      {+        "number": "4",+        "name": "OUT",+        "type": "output",+        "description": "Comparator output; latches on the first threshold crossing until cleared by CLR."+      },+      {+        "number": "5",+        "name": "CLR",+        "type": "input",+        "description": "Clear input; pulse high (> 1.2V) to clear the output latch."+      },+      {+        "number": "6",+        "name": "V+",+        "type": "power_in",+        "description": "Positive supply voltage pin."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The MPN TLV9020L1DCKR is listed on page 29 as SC70 (DCK), 6 pins. The package hint gave 6-TSSOP/SC-8"+        ],+        "pages_sent": 9,+        "cost_usd": 0.0251,+        "at": "2026-11-02T20:07:42"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/tlv9020l.pdf",+        "pages": 40,+        "sha256": "a8706fdf8ff72411",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 6,+        "described": 6,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tlv9020l1dckr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          2.26,+          2.0,+          1.0+        ],+        "zmin_mm": 0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "d888adfa87e1270a1da73afd8d86c95d26903dd7c877b314a7dfd6cf0cf5374a",+        "checked": "2026-11-02",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tlv9020l1dckr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          2.26,+          2.0,+          1.0+        ],+        "zmin_mm": 0.0,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "78a5cf7a3651264ea4ba5520208fa44d6f287c3a159880c0786a246383938c61",+        "checked": "2026-11-02",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  }+}
page.jsonadded+187
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tlv9020l1dckr-hero.overlay.jsonadded+221
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tlv9020l1dckr.glbadded
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tlv9020l1dckr.kicad_modadded+28
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tlv9020l1dckr.kicad_symadded+37
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tlv9020l1dckr.lbradded+121
@@ -0,0 +1,121 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>+<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>+<layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>+<layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>+<layer number="32" name="bCream" color="7" fill="5" visible="no" active="yes"/>+<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="yes"/>+<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="yes"/>+<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="yes"/>+<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="yes"/>+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="yes"/>+<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="yes"/>+<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="yes"/>+<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="yes"/>+<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="yes"/>+<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="yes"/>+<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/>+<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/>+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/>+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/>+<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/>+<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/>+<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>+<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>+<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>+<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/>+<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/>+<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/>+<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/>+<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/>+</layers>+<library>+<description>Texas Instruments Integrated Circuits (ICs), 6-TSSOP, SC-88, SOT-363. Pinout cross-checked by two models against the datasheet</description>+<packages>+<package name="Texas_Instruments_TLV9020">+  <description>6 pads, 3.1 x 1.7 mm. Generated from the Texas Instruments datasheet land pattern (family R1203, spec e29cc25397)</description>+  <smd name="1" x="-1.1000" y="0.6500" dx="0.9000" dy="0.4000" layer="1" roundness="50"/>+  <smd name="2" x="-1.1000" y="-0.0000" dx="0.9000" dy="0.4000" layer="1" roundness="50"/>+  <smd name="3" x="-1.1000" y="-0.6500" dx="0.9000" dy="0.4000" layer="1" roundness="50"/>+  <smd name="4" x="1.1000" y="-0.6500" dx="0.9000" dy="0.4000" layer="1" roundness="50"/>+  <smd name="5" x="1.1000" y="-0.0000" dx="0.9000" dy="0.4000" layer="1" roundness="50"/>+  <smd name="6" x="1.1000" y="0.6500" dx="0.9000" dy="0.4000" layer="1" roundness="50"/>+  <wire x1="-0.6250" y1="1.0000" x2="0.6250" y2="1.0000" width="0.1000" layer="51"/>+  <wire x1="0.6250" y1="1.0000" x2="0.6250" y2="-1.0000" width="0.1000" layer="51"/>+  <wire x1="0.6250" y1="-1.0000" x2="-0.6250" y2="-1.0000" width="0.1000" layer="51"/>+  <wire x1="-0.6250" y1="-1.0000" x2="-0.6250" y2="1.0000" width="0.1000" layer="51"/>+  <wire x1="-1.9500" y1="0.8500" x2="-1.9500" y2="0.4500" width="0.1200" layer="21"/>+  <text x="0" y="1.700" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>+  <text x="0" y="-1.700" size="1.27" layer="27" align="top-center">&gt;VALUE</text>+</package>+</packages>+<symbols>+<symbol name="TLV9020L1DCKR">+  <description>Texas Instruments Integrated Circuits (ICs), 6-TSSOP, SC-88, SOT-363. Pinout cross-checked by two models against the datasheet</description>+  <wire x1="-12.7" y1="5.08" x2="12.7" y2="5.08" width="0.254" layer="94"/>+  <wire x1="12.7" y1="5.08" x2="12.7" y2="-5.08" width="0.254" layer="94"/>+  <wire x1="12.7" y1="-5.08" x2="-12.7" y2="-5.08" width="0.254" layer="94"/>+  <wire x1="-12.7" y1="-5.08" x2="-12.7" y2="5.08" width="0.254" layer="94"/>+  <text x="0.0000" y="7.6200" size="1.27" layer="95" align="center">&gt;NAME</text>+  <text x="0.0000" y="-7.6200" size="1.27" layer="96" align="center">&gt;VALUE</text>+  <pin name="IN+" x="-17.78" y="2.54" length="middle" direction="in"/>+  <pin name="V-" x="-17.78" y="0" length="middle" direction="pwr"/>+  <pin name="IN-" x="-17.78" y="-2.54" length="middle" direction="in"/>+  <pin name="V+" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>+  <pin name="CLR" x="17.78" y="0" length="middle" direction="in" rot="R180"/>+  <pin name="OUT" x="17.78" y="-2.54" length="middle" direction="out" rot="R180"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="TLV9020L1DCKR" prefix="U">+  <description>Texas Instruments Integrated Circuits (ICs), 6-TSSOP, SC-88, SOT-363. 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viewers/footprint.htmladded+1
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viewers/symbol.htmladded+1
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