← Commit history

Publish 0.2.0

Ray ·410ea08be0 · ·parent e8f6dcf
3 files changed +22−8
README.md+14
@@ -32,6 +32,20 @@ TLV803SDBZR from Texas Instruments, in a SOT-23. Pinout and pin descriptions ext - Footprint: `Package_TO_SOT_SMD:SOT-23` - 3D model: SOT-23 (KiCad packages3D, STEP) +## 3D model downloads++Two STEP files. Same geometry, different body top:++| File | Size | Use it when |+|---|---|---|+| [`tlv803sdbzr.step`](tlv803sdbzr.step) | 59 KB | You want the bare part, or you mark your own boards. |+| [`tlv803sdbzr-etched.step`](tlv803sdbzr-etched.step) | 2.1 MB | You want the part with `TLV803SDBZR` already on it. |++The marking in the etched file is real recessed geometry cut into the solid, not a+texture or a decal: 498 faces against 69 in the bare model. It+survives export, section views, and rendering in any CAD tool, and it drops straight+into KiCad or Fusion with no extra setup.+ ## Provenance  Data extracted from the manufacturer datasheet, not a distributor listing:
package.json+1−1
@@ -1,6 +1,6 @@ {   "slug": "tlv803sdbzr",-  "version": "0.1.0",+  "version": "0.2.0",   "type": "component",   "description": "Texas Instruments Supervisor and Reset ICs, SOT-23. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "tags": [
page.json+7−7
@@ -4,7 +4,7 @@   "slug": "tlv803sdbzr",   "title": "TLV803SDBZR",   "brief": "Texas Instruments Supervisor and Reset ICs, SOT-23. Datasheet-verified pinout, KiCad symbol/footprint/3D.",-  "version": "0.1.0",+  "version": "0.2.0",   "license": "CC-BY-SA-4.0",   "tags": [     "component",@@ -41,13 +41,13 @@         "number": "2",         "name": "RESET",         "type": "output",-        "description": "Active-low open-drain RESET output. Driven low when VDD falls below the negative-going threshold VIT- (2.93 V for TLV803S) and remains low for the delay time td (200 ms typ) after VDD exceeds VIT-. Requires a 10 k\u03a9 to 1 M\u03a9 external pull-up; pull-up voltage is not limited to VDD."+        "description": "Active-low open-drain RESET output. Driven low when VDD falls below the negative-going threshold VIT- (2.93 V for TLV803S) and remains low for the delay time td (200 ms typ) after VDD exceeds VIT-. Requires a 10 kΩ to 1 MΩ external pull-up; pull-up voltage is not limited to VDD."       },       {         "number": "3",         "name": "VDD",         "type": "power_in",-        "description": "Supply voltage input. Recommended operating range 1.1 V to 6 V; absolute maximum 7 V. Place a 0.1 \u00b5F ceramic bypass capacitor close to this pin. Supply current IDD \u2248 9 \u00b5A typ."+        "description": "Supply voltage input. Recommended operating range 1.1 V to 6 V; absolute maximum 7 V. Place a 0.1 µF ceramic bypass capacitor close to this pin. Supply current IDD ≈ 9 µA typ."       }     ],     "provenance": {@@ -121,9 +121,9 @@     "docs/hero.png",     "docs/tlv803sdbzr-datasheet.pdf",     "viewers/symbol.html",-    "viewers/footprint.html"+    "viewers/footprint.html",+    "pads.json"   ],-  "visibility": {-    "public": true-  }+  "visibility": "public",+  "description": "Texas Instruments Supervisor and Reset ICs, SOT-23. Datasheet-verified pinout, KiCad symbol/footprint/3D." }\ No newline at end of file