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TLV5624CDGKR
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Texas Instruments Digital To Analog Converters (DACs), VSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# TLV5624CDGKR++**Texas Instruments** · Digital To Analog Converters (DACs) · VSSOP-8++TLV5624CDGKR from Texas Instruments, in a VSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DIN | input | Digital serial data input; the 16-bit word carries 4 control bits and 8 data bits, shifted in MSB first on high-to-low SCLK transitions. |+| 2 | SCLK | input | Digital serial clock input; the maximum serial clock frequency is 20 MHz. |+| 3 | CS | input | Chip select, a digital input active low used to enable or disable the inputs; it can be tied low when only one device is on the serial bus. |+| 4 | FS | input | Frame sync input; a falling edge starts the serial data shift, and the DAC updates after 16 bits are shifted in or on the FS rising edge. |+| 5 | AGND | power_in | Analog ground for the DAC; the datasheet recommends connecting it to the system analog ground plane. |+| 6 | REF | bidirectional | Analog reference voltage input/output; a 0.1 µF bypass capacitor is required, plus 10 µF if the internal reference is used, and an external reference must stay within AGND to VDD−1.5 V. |+| 7 | OUT | output | DAC A analog voltage output from a x2 gain rail-to-rail buffer, specified for load resistance of at least 2 kΩ and load capacitance up to 100 pF. |+| 8 | VDD | power_in | Positive power supply; the device is specified for single-supply operation from 2.7 V to 5.5 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-8 |+| Category | ADC/DAC/Data Conversion |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TLV5624CDGKR`+- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`+- 3D model: VSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `tlv5624cdgkr-etched.step` / `tlv5624cdgkr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlv5624cdgkr.step` / `tlv5624cdgkr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv5624) (26 pp, sha256 `5ae4849781b211d0`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlv5624cdgkr-datasheet.pdf)
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