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tlv3501aidbvr: factory component page (tier=mfr)

Ray ·70530eeaaa ·2mo ago ·parent 4348614
3 files changed +24−21
README.md+8−8
@@ -8,12 +8,12 @@ TLV3501AIDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions  | Pin | Name | Type | Function | |---|---|---|---|-| 1 | -IN | input | Negative (inverting) comparator input. High-impedance CMOS input (~10^13 Ω || 2 pF common-mode). Input common-mode range extends 0.2 V beyond either rail; signals swinging more than 0.3 V beyond the rails must be current-limited to <=10 mA via input diode clamps. |-| 2 | V- | power_in | Negative (lowest) power supply pin. Typically tied to GND for single-supply operation. Total supply voltage (V+ - V-) must be 2.2 V to 5.5 V. |-| 3 | +IN | input | Positive (noninverting) comparator input. High-impedance CMOS input (~10^13 Ω || 2 pF common-mode). Input common-mode range extends 0.2 V beyond either rail; input current must be limited to <=10 mA if signal exceeds supply rails by more than 0.3 V. |-| 4 | V+ | power_in | Positive (highest) power supply pin. 2.7 V to 5.5 V (2.2 V min operating). Bypass with 100 nF ceramic close to the pin; quiescent current is 3.2 mA typical. |-| 5 | OUT | output | Push-pull rail-to-rail CMOS output. 4.5 ns propagation delay. Swings within 30 mV (typ) of either rail at +/-1 mA load; short-circuit current limited to 74 mA max per Absolute Maximum Ratings. |-| 6 | SHDN | input | Active-high shutdown control. When SHDN is within 0.9 V of V+ the comparator is disabled (I_QSD ~2 uA); when SHDN is more than 1.7 V below V+ the comparator is enabled. Turn-on time ~100 ns; turn-off time ~30 ns. Do not leave floating. |+| 1 | -IN | input | Negative (inverting) comparator input. Common-mode range extends from (V-) - 0.2 V to (V+) + 0.2 V; input bias current ±2 pA typical. Input signals swinging more than 0.3 V beyond the supply rails must be current-limited to 10 mA. |+| 2 | V- | power_in | Negative (lowest) power supply. Typically tied to GND for single-supply operation; total supply span (V+) - (V-) must be 2.7 V to 5.5 V. |+| 3 | +IN | input | Positive (noninverting) comparator input. Common-mode range extends from (V-) - 0.2 V to (V+) + 0.2 V; input bias current ±2 pA typical. |+| 4 | V+ | power_in | Positive (highest) power supply, 2.7 V to 5.5 V. Quiescent current is 3.2 mA typical with the output high; bypass locally with a low-ESR ceramic capacitor. |+| 5 | OUT | output | Push-pull CMOS comparator output. Swings rail-to-rail within 30 mV (typ) at ±1 mA load; drives CMOS or TTL logic directly with 4.5 ns propagation delay. |+| 6 | SHDN | input | Active-high shutdown input. When SHDN is within 0.9 V of V+ the comparator is disabled (I_QSD = 2 µA typ); when SHDN is more than 1.7 V below V+ the comparator is enabled. Turn-off time 30 ns, turn-on time 100 ns. |  ## Key specifications @@ -28,12 +28,12 @@ TLV3501AIDBVR from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions  - `TLV3501AIDBVRIDBVR` - `TLV3501AIDBVRIDBVT`-- `TLV3501AIDBVRID` - `TLV3501AIDBVRIDR`+- `TLV3501AIDBVRID` - `TLV3501AIDBVRIDCNR` - `TLV3501AIDBVRIDCNT`-- `TLV3501AIDBVRID` - `TLV3501AIDBVRIDR`+- `TLV3501AIDBVRID`  ## CAD (KiCad official) 
page.json+7−10
@@ -32,37 +32,37 @@         "number": "1",         "name": "-IN",         "type": "input",-        "description": "Negative (inverting) comparator input. High-impedance CMOS input (~10^13 Ω || 2 pF common-mode). Input common-mode range extends 0.2 V beyond either rail; signals swinging more than 0.3 V beyond the rails must be current-limited to <=10 mA via input diode clamps."+        "description": "Negative (inverting) comparator input. Common-mode range extends from (V-) - 0.2 V to (V+) + 0.2 V; input bias current \u00b12 pA typical. Input signals swinging more than 0.3 V beyond the supply rails must be current-limited to 10 mA."       },       {         "number": "2",         "name": "V-",         "type": "power_in",-        "description": "Negative (lowest) power supply pin. Typically tied to GND for single-supply operation. Total supply voltage (V+ - V-) must be 2.2 V to 5.5 V."+        "description": "Negative (lowest) power supply. Typically tied to GND for single-supply operation; total supply span (V+) - (V-) must be 2.7 V to 5.5 V."       },       {         "number": "3",         "name": "+IN",         "type": "input",-        "description": "Positive (noninverting) comparator input. High-impedance CMOS input (~10^13 Ω || 2 pF common-mode). Input common-mode range extends 0.2 V beyond either rail; input current must be limited to <=10 mA if signal exceeds supply rails by more than 0.3 V."+        "description": "Positive (noninverting) comparator input. Common-mode range extends from (V-) - 0.2 V to (V+) + 0.2 V; input bias current \u00b12 pA typical."       },       {         "number": "4",         "name": "V+",         "type": "power_in",-        "description": "Positive (highest) power supply pin. 2.7 V to 5.5 V (2.2 V min operating). Bypass with 100 nF ceramic close to the pin; quiescent current is 3.2 mA typical."+        "description": "Positive (highest) power supply, 2.7 V to 5.5 V. Quiescent current is 3.2 mA typical with the output high; bypass locally with a low-ESR ceramic capacitor."       },       {         "number": "5",         "name": "OUT",         "type": "output",-        "description": "Push-pull rail-to-rail CMOS output. 4.5 ns propagation delay. Swings within 30 mV (typ) of either rail at +/-1 mA load; short-circuit current limited to 74 mA max per Absolute Maximum Ratings."+        "description": "Push-pull CMOS comparator output. Swings rail-to-rail within 30 mV (typ) at \u00b11 mA load; drives CMOS or TTL logic directly with 4.5 ns propagation delay."       },       {         "number": "6",         "name": "SHDN",         "type": "input",-        "description": "Active-high shutdown control. When SHDN is within 0.9 V of V+ the comparator is disabled (I_QSD ~2 uA); when SHDN is more than 1.7 V below V+ the comparator is enabled. Turn-on time ~100 ns; turn-off time ~30 ns. Do not leave floating."+        "description": "Active-high shutdown input. When SHDN is within 0.9 V of V+ the comparator is disabled (I_QSD = 2 \u00b5A typ); when SHDN is more than 1.7 V below V+ the comparator is enabled. Turn-off time 30 ns, turn-on time 100 ns."       }     ],     "provenance": {@@ -126,8 +126,5 @@     "docs/tlv3501aidbvr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": {-    "public": true-  }+  ] }\ No newline at end of file
tlv3501aidbvr.lbr+9−3
@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>Texas Instruments Comparators, SOT-23-6</description> <packages> <package name="SOT-23-6">   <description>6 pads, 3.6 x 2.5 mm. SOT, 6 Pin</description>@@ -84,6 +84,7 @@ </packages> <symbols> <symbol name="TLV3501AIDBVR">+  <description>Texas Instruments Comparators, SOT-23-6</description>   <wire x1="-12.7" y1="5.08" x2="12.7" y2="5.08" width="0.254" layer="94"/>   <wire x1="12.7" y1="5.08" x2="12.7" y2="-5.08" width="0.254" layer="94"/>   <wire x1="12.7" y1="-5.08" x2="-12.7" y2="-5.08" width="0.254" layer="94"/>@@ -100,7 +101,7 @@ </symbols> <devicesets> <deviceset name="TLV3501AIDBVR" prefix="U">-  <description></description>+  <description>Texas Instruments Comparators, SOT-23-6</description>   <gates>     <gate name="G$1" symbol="TLV3501AIDBVR" x="0" y="0"/>   </gates>@@ -114,7 +115,12 @@         <connect gate="G$1" pin="OUT" pad="5"/>         <connect gate="G$1" pin="V+" pad="4"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="TLV3501AIDBVR" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>