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TLC2933AIPWR
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Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# TLC2933AIPWR++**Texas Instruments** · Clock Generators, PLLs, Frequency Synthesizers · TSSOP-14++TLC2933AIPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | LOGIC VDD | power_in | Power supply for the internal logic; it should be separated from VCO VDD to reduce cross-coupling, and the two supplies should be at the same voltage (2.85 to 3.15 V, 3.135 to 3.465 V, or 4.75 to 5.25 V). |+| 2 | SELECT | input | VCO output frequency select: when high the VCO output is ×1/2 fOSC, and when low the VCO output is ×1 fOSC. |+| 3 | VCO OUT | output | VCO output, which is held low while VCO INHIBIT is high. |+| 4 | FIN−A | input | Reference frequency input f(REF IN) is applied to this pin; the PFD compares it with FIN-B, with input VIH minimum 2.1 V and VIL maximum 0.5 V at VDD = 3 V. |+| 5 | FIN−B | input | Input for the VCO external counter output frequency f(FIN-B), nominally supplied from the external counter. |+| 6 | PFD OUT | output | PFD output, which goes to the high-impedance state while PFD INHIBIT is high. |+| 7 | LOGIC GND | power_in | Ground reference for the internal logic. |+| 8 | TEST | passive | Connect to GND. |+| 9 | PFD INHIBIT | input | PFD inhibit control: when high, PFD OUT is placed in the high-impedance state, phase detection stops and the PFD is in power-down mode. |+| 10 | VCO INHIBIT | input | VCO inhibit control: when high, VCO oscillation stops, the VCO is powered down and VCO OUT is held low. |+| 11 | VCO GND | power_in | Ground reference for the VCO. |+| 12 | VCO IN | input | VCO control voltage input, nominally driven from the external loop filter output; the recommended control voltage is 0.9 V to VDD. |+| 13 | RBIAS | input | Bias node for the external resistor RBIAS connected between VCO VDD and this pin, which sets the VCO oscillation frequency range; recommended RBIAS is 2.2 kΩ to 5.1 kΩ. |+| 14 | VCO VDD | power_in | Power supply for the VCO; it should be separated from LOGIC VDD to reduce cross-coupling, and the two supplies should be at the same voltage (2.85 to 3.15 V, 3.135 to 3.465 V, or 4.75 to 5.25 V). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Clock/Timing |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `TLC2933AIPWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `tlc2933aipwr-etched.step` / `tlc2933aipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tlc2933aipwr.step` / `tlc2933aipwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlc2933a) (25 pp, sha256 `fbfaa0b8108a8193`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlc2933aipwr-datasheet.pdf)
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Typed a; The terminal table lists RBIAS as type I, but the pin functions as the external bias-resistor node r"+ ],+ "pages_sent": 25,+ "cost_usd": 0.0968,+ "at": "2026-10-08T03:35:44"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tlc2933a",+ "pages": 25,+ "sha256": "fbfaa0b8108a8193",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tlc2933aipwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tlc2933aipwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "1a5a1311ab6494a6dada088140c6c9b79f23341cf77934c7ad6a7a9ac127c0f1",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}