TLC2274ACDR

@@ -0,0 +1,54 @@+# TLC2274ACDR++**UMW** · Operational Amplifier · SOP-14++TLC2274ACDR from UMW, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OUT | output | Output of op-amp channel 1. Rail-to-rail output, capable of sourcing/sinking up to ±50 mA (absolute max). |+| 2 | 1IN- | input | Inverting input of op-amp channel 1. High-impedance CMOS input, typical input bias current 1 pA. |+| 3 | 1IN+ | input | Non-inverting input of op-amp channel 1. High-impedance CMOS input with common-mode range including the negative supply rail. |+| 4 | VDD+ | power_in | Positive (highest) supply pin. Absolute maximum 8 V with respect to the VDD+/VDD- midpoint (16 V max across supplies). |+| 5 | 2IN+ | input | Non-inverting input of op-amp channel 2. High-impedance CMOS input with common-mode range including the negative supply rail. |+| 6 | 2IN- | input | Inverting input of op-amp channel 2. High-impedance CMOS input, typical input bias current 1 pA. |+| 7 | 2OUT | output | Output of op-amp channel 2. Rail-to-rail output, capable of sourcing/sinking up to ±50 mA (absolute max). |+| 8 | 3OUT | output | Output of op-amp channel 3. Rail-to-rail output, capable of sourcing/sinking up to ±50 mA (absolute max). |+| 9 | 3IN- | input | Inverting input of op-amp channel 3. High-impedance CMOS input, typical input bias current 1 pA. |+| 10 | 3IN+ | input | Non-inverting input of op-amp channel 3. High-impedance CMOS input with common-mode range including the negative supply rail. |+| 11 | VDD- | power_in | Negative (lowest) supply pin. Tie to GND for single-supply operation or to a negative rail (down to -8 V max) for split-supply operation. |+| 12 | 4IN+ | input | Non-inverting input of op-amp channel 4. High-impedance CMOS input with common-mode range including the negative supply rail. |+| 13 | 4IN- | input | Inverting input of op-amp channel 4. High-impedance CMOS input, typical input bias current 1 pA. |+| 14 | 4OUT | output | Output of op-amp channel 4. Rail-to-rail output, capable of sourcing/sinking up to ±50 mA (absolute max). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | UMW |+| Package | SOP-14 |+| Category | Op-amp/Cmp |+| Pins | 14 |++## Ordering variants++- `TLC2274ACDRDR`+- `TLC2274ACDRD`++## CAD (KiCad official)++- Symbol: `TLC2274ACDR`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOP-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [UMW datasheet](docs/tlc2274acdr-datasheet.pdf) (30 pp, sha256 `ead5615846e4c74e`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tlc2274acdr-datasheet.pdf)

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