← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (LCSC_PN C6956). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·a746fb8077 ·2mo ago ·parent 9073e2a
2 files changed +30−10
page.json+10−8
@@ -26,25 +26,27 @@       "model_3d_step": "tl062cdt.step",       "lbr": "tl062cdt.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "lcsc": "C6956"+    },     "pins": [       {         "number": "1",         "name": "OUT1",         "type": "output",-        "description": "Output of op-amp channel 1. Push-pull output with short-circuit protection to ground or either supply; typical output swing 27 V p-p into 10 kΩ at VCC = ±15 V."+        "description": "Output of op-amp channel 1. Push-pull output with short-circuit protection to ground or either supply; typical output swing 27 V p-p into 10 k\u03a9 at VCC = \u00b115 V."       },       {         "number": "2",         "name": "IN1-",         "type": "input",-        "description": "Inverting input of op-amp channel 1. High-impedance JFET gate input (typ. 10^12 Ω); input bias current 30 pA typ. Differential input voltage rating ±30 V."+        "description": "Inverting input of op-amp channel 1. High-impedance JFET gate input (typ. 10^12 \u03a9); input bias current 30 pA typ. Differential input voltage rating \u00b130 V."       },       {         "number": "3",         "name": "IN1+",         "type": "input",-        "description": "Non-inverting input of op-amp channel 1. High-impedance JFET gate input; common-mode range typ. +15/-12 V at VCC = ±15 V. Input voltage must not exceed the magnitude of the supply or 15 V."+        "description": "Non-inverting input of op-amp channel 1. High-impedance JFET gate input; common-mode range typ. +15/-12 V at VCC = \u00b115 V. Input voltage must not exceed the magnitude of the supply or 15 V."       },       {         "number": "4",@@ -56,25 +58,25 @@         "number": "5",         "name": "IN2+",         "type": "input",-        "description": "Non-inverting input of op-amp channel 2. High-impedance JFET gate input; common-mode range typ. +15/-12 V at VCC = ±15 V."+        "description": "Non-inverting input of op-amp channel 2. High-impedance JFET gate input; common-mode range typ. +15/-12 V at VCC = \u00b115 V."       },       {         "number": "6",         "name": "IN2-",         "type": "input",-        "description": "Inverting input of op-amp channel 2. High-impedance JFET gate input (typ. 10^12 Ω); input bias current 30 pA typ."+        "description": "Inverting input of op-amp channel 2. High-impedance JFET gate input (typ. 10^12 \u03a9); input bias current 30 pA typ."       },       {         "number": "7",         "name": "OUT2",         "type": "output",-        "description": "Output of op-amp channel 2. Push-pull output with short-circuit protection; typical output swing 27 V p-p into 10 kΩ at VCC = ±15 V. Slew rate 3.5 V/µs typ."+        "description": "Output of op-amp channel 2. Push-pull output with short-circuit protection; typical output swing 27 V p-p into 10 k\u03a9 at VCC = \u00b115 V. Slew rate 3.5 V/\u00b5s typ."       },       {         "number": "8",         "name": "VCC+",         "type": "power_in",-        "description": "Positive supply rail. Absolute maximum ±18 V; total supply 6 V to 36 V. Supply current only 200 µA typ. (250 µA max) for both channels with no load."+        "description": "Positive supply rail. Absolute maximum \u00b118 V; total supply 6 V to 36 V. Supply current only 200 \u00b5A typ. (250 \u00b5A max) for both channels with no load."       }     ],     "provenance": {
tl062cdt.lbr+20−2
@@ -62,6 +62,18 @@   <smd name="6" x="2.4750" y="-0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="7" x="2.4750" y="0.6350" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="8" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="2.4700"/>+    <vertex x="-2.8400" y="2.8000"/>+    <vertex x="-2.3600" y="2.8000"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="2.4500"/>+    <vertex x="1.9500" y="2.4500"/>+    <vertex x="1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="-2.4500"/>+    <vertex x="-1.9500" y="1.4750"/>+  </polygon>   <wire x1="-2.0600" y1="2.5600" x2="2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="2.4650" x2="-2.0600" y2="2.5600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-2.5600" x2="-2.0600" y2="-2.4650" width="0.1200" layer="21"/>@@ -70,7 +82,7 @@   <wire x1="2.0600" y1="-2.5600" x2="-2.0600" y2="-2.5600" width="0.1200" layer="21"/>   <text x="0" y="3.480" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-3.480" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="2.4700"/><vertex x="-2.8400" y="2.8000"/><vertex x="-2.3600" y="2.8000"/></polygon></package>+</package> </packages> <symbols> <symbol name="TL062CDT">@@ -108,7 +120,13 @@         <connect gate="G$1" pin="IN2-" pad="6"/>         <connect gate="G$1" pin="IN2+" pad="5"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="TL062CDT" constant="no"/>+          <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/>+          <attribute name="LCSC_PN" value="C6956" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>