component
TJA1050DRG
Public Made by Adomby adom
HANSCHIP semiconductor CAN ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+116−8@@ -1,13 +1,126 @@ {+ "schema_version": 1,+ "type": "component", "slug": "tja1050drg",+ "title": "TJA1050DRG",+ "brief": "HANSCHIP semiconductor CAN ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "HANSCHIP semiconductor CAN ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "comm-uart", "tja1050drg" ],+ "component": {+ "mpn": "TJA1050DRG",+ "manufacturer": "HANSCHIP semiconductor",+ "package": "SOP-8",+ "pin_count": 8,+ "category": "Comm/UART",+ "subcategory": "CAN ICs",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2312291742_HANSCHIP-semiconductor-TJA1050DRG_C19723770.pdf",+ "parts": {+ "symbol": "tja1050drg.kicad_sym",+ "footprint": "tja1050drg.kicad_mod",+ "model_3d": "tja1050drg.glb",+ "model_3d_step": "tja1050drg.step",+ "lbr": "tja1050drg.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "TXD",+ "type": "input",+ "description": "Transmit data input from the CAN controller. TTL/CMOS-compatible input (VIH \u2265 2 V, VIL \u2264 0.8 V, tolerant to VCC+0.3 V). Driving low forces a dominant bit on the bus; high (or floating with internal pull-up) leaves the bus recessive."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground reference. Connect to the system 0 V rail."+ },+ {+ "number": "3",+ "name": "VCC",+ "type": "power_in",+ "description": "Supply voltage input, 4.75 V to 5.25 V nominal (absolute max \u22120.3 V to 6 V). Typical ICC \u2248 5 mA recessive / 50 mA dominant in normal mode and \u224810 \u00b5A in standby mode. Decouple locally with a 100 nF ceramic capacitor."+ },+ {+ "number": "4",+ "name": "RXD",+ "type": "output",+ "description": "Receive data output to the CAN controller. Reports the bus state: LOW = dominant, HIGH = recessive. Push-pull output with VOH \u2248 VCC\u22120.7 V at \u2212100 \u00b5A and IOL sink capability of 6 mA typ."+ },+ {+ "number": "5",+ "name": "SPLIT",+ "type": "output",+ "description": "Common-mode stabilization output, typically 0.5\u00b7VCC in normal mode (driving up to \u00b1500 \u00b5A). Intended for connection to the mid-point of a split bus termination (two 60 \u03a9 resistors) to improve EMC. High-impedance in standby mode; \u00b127 V DC tolerant."+ },+ {+ "number": "6",+ "name": "CANL",+ "type": "bidirectional",+ "description": "Low-side CAN bus line. Dominant output \u22481.4 V (0.5-1.75 V); recessive \u22480.5\u00b7VCC. Withstands \u221227 V to +40 V DC and ISO 7637 transients to \u00b1200 V; ESD \u00b16 kV HBM."+ },+ {+ "number": "7",+ "name": "CANH",+ "type": "bidirectional",+ "description": "High-side CAN bus line. Dominant output \u22483.6 V (3.0-4.25 V); recessive \u22480.5\u00b7VCC. Withstands \u221227 V to +40 V DC and ISO 7637 transients to \u00b1200 V; ESD \u00b16 kV HBM."+ },+ {+ "number": "8",+ "name": "STB",+ "type": "input",+ "description": "Standby-mode control input. LOW = normal (high-speed) mode; HIGH = low-current standby with bus wake-up detection. TTL/CMOS-compatible (VIH \u2265 2 V, VIL \u2264 0.8 V)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2312291742_HANSCHIP-semiconductor-TJA1050DRG_C19723770.pdf",+ "pages": 11,+ "sha256": "510a842962d0cdd8",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "HANSCHIP semiconductor",+ "Package": "SOP-8",+ "Category": "Comm/UART",+ "Pins": "8"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "tja1050drg"+ ],+ "discovery_pitch": "TJA1050DRG (HANSCHIP semiconductor) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +138,5 @@ "docs/tja1050drg-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }