component
TJA1050DRG
Public Made by Adomby adom
HANSCHIP semiconductor CAN ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+11−8@@ -32,7 +32,7 @@ "number": "1", "name": "TXD", "type": "input",- "description": "Transmit data input from the CAN controller. TTL/CMOS-compatible input (VIH \u2265 2 V, VIL \u2264 0.8 V, tolerant to VCC+0.3 V). Driving low forces a dominant bit on the bus; high (or floating with internal pull-up) leaves the bus recessive."+ "description": "Transmit data input from the CAN controller. TTL/CMOS-compatible input (VIH ≥ 2 V, VIL ≤ 0.8 V, tolerant to VCC+0.3 V). Driving low forces a dominant bit on the bus; high (or floating with internal pull-up) leaves the bus recessive." }, { "number": "2",@@ -44,37 +44,37 @@ "number": "3", "name": "VCC", "type": "power_in",- "description": "Supply voltage input, 4.75 V to 5.25 V nominal (absolute max \u22120.3 V to 6 V). Typical ICC \u2248 5 mA recessive / 50 mA dominant in normal mode and \u224810 \u00b5A in standby mode. Decouple locally with a 100 nF ceramic capacitor."+ "description": "Supply voltage input, 4.75 V to 5.25 V nominal (absolute max −0.3 V to 6 V). Typical ICC ≈ 5 mA recessive / 50 mA dominant in normal mode and ≈10 µA in standby mode. Decouple locally with a 100 nF ceramic capacitor." }, { "number": "4", "name": "RXD", "type": "output",- "description": "Receive data output to the CAN controller. Reports the bus state: LOW = dominant, HIGH = recessive. Push-pull output with VOH \u2248 VCC\u22120.7 V at \u2212100 \u00b5A and IOL sink capability of 6 mA typ."+ "description": "Receive data output to the CAN controller. Reports the bus state: LOW = dominant, HIGH = recessive. Push-pull output with VOH ≈ VCC−0.7 V at −100 µA and IOL sink capability of 6 mA typ." }, { "number": "5", "name": "SPLIT", "type": "output",- "description": "Common-mode stabilization output, typically 0.5\u00b7VCC in normal mode (driving up to \u00b1500 \u00b5A). Intended for connection to the mid-point of a split bus termination (two 60 \u03a9 resistors) to improve EMC. High-impedance in standby mode; \u00b127 V DC tolerant."+ "description": "Common-mode stabilization output, typically 0.5·VCC in normal mode (driving up to ±500 µA). Intended for connection to the mid-point of a split bus termination (two 60 Ω resistors) to improve EMC. High-impedance in standby mode; ±27 V DC tolerant." }, { "number": "6", "name": "CANL", "type": "bidirectional",- "description": "Low-side CAN bus line. Dominant output \u22481.4 V (0.5-1.75 V); recessive \u22480.5\u00b7VCC. Withstands \u221227 V to +40 V DC and ISO 7637 transients to \u00b1200 V; ESD \u00b16 kV HBM."+ "description": "Low-side CAN bus line. Dominant output ≈1.4 V (0.5-1.75 V); recessive ≈0.5·VCC. Withstands −27 V to +40 V DC and ISO 7637 transients to ±200 V; ESD ±6 kV HBM." }, { "number": "7", "name": "CANH", "type": "bidirectional",- "description": "High-side CAN bus line. Dominant output \u22483.6 V (3.0-4.25 V); recessive \u22480.5\u00b7VCC. Withstands \u221227 V to +40 V DC and ISO 7637 transients to \u00b1200 V; ESD \u00b16 kV HBM."+ "description": "High-side CAN bus line. Dominant output ≈3.6 V (3.0-4.25 V); recessive ≈0.5·VCC. Withstands −27 V to +40 V DC and ISO 7637 transients to ±200 V; ESD ±6 kV HBM." }, { "number": "8", "name": "STB", "type": "input",- "description": "Standby-mode control input. LOW = normal (high-speed) mode; HIGH = low-current standby with bus wake-up detection. TTL/CMOS-compatible (VIH \u2265 2 V, VIL \u2264 0.8 V)."+ "description": "Standby-mode control input. LOW = normal (high-speed) mode; HIGH = low-current standby with bus wake-up detection. TTL/CMOS-compatible (VIH ≥ 2 V, VIL ≤ 0.8 V)." } ], "provenance": {@@ -138,5 +138,8 @@ "docs/tja1050drg-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }